{"id":"https://openalex.org/W1594870794","doi":"https://doi.org/10.1109/iscas.2015.7168999","title":"Memory-efficient discrete wavelet transform architecture based on wordlength optimization","display_name":"Memory-efficient discrete wavelet transform architecture based on wordlength optimization","publication_year":2015,"publication_date":"2015-05-01","ids":{"openalex":"https://openalex.org/W1594870794","doi":"https://doi.org/10.1109/iscas.2015.7168999","mag":"1594870794"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2015.7168999","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2015.7168999","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5036244583","display_name":"Yusong Hu","orcid":null},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":true,"raw_author_name":"Yusong Hu","raw_affiliation_strings":["School of Electrical and Electronic Engineering Nanyang Technological University, Singapore","School of Electrical & Electronic Engineering , Nanyang Technological University , Singapore"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Electronic Engineering Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]},{"raw_affiliation_string":"School of Electrical & Electronic Engineering , Nanyang Technological University , Singapore","institution_ids":["https://openalex.org/I172675005"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5018516888","display_name":"Ching Chuen Jong","orcid":"https://orcid.org/0000-0003-1178-9062"},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Ching Chuen Jong","raw_affiliation_strings":["School of Electrical and Electronic Engineering Nanyang Technological University, Singapore","School of Electrical & Electronic Engineering , Nanyang Technological University , Singapore"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Electronic Engineering Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]},{"raw_affiliation_string":"School of Electrical & Electronic Engineering , Nanyang Technological University , Singapore","institution_ids":["https://openalex.org/I172675005"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5036244583"],"corresponding_institution_ids":["https://openalex.org/I172675005"],"apc_list":null,"apc_paid":null,"fwci":0.1841,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.55452079,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":"11","issue":null,"first_page":"1778","last_page":"1781"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10901","display_name":"Advanced Data Compression Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10901","display_name":"Advanced Data Compression Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10688","display_name":"Image and Signal Denoising Methods","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.9962999820709229,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7311172485351562},{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.5294382572174072},{"id":"https://openalex.org/keywords/discrete-wavelet-transform","display_name":"Discrete wavelet transform","score":0.5049269795417786},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.49157723784446716},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.46643972396850586},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.4544423818588257},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.4490257203578949},{"id":"https://openalex.org/keywords/throughput","display_name":"Throughput","score":0.44716769456863403},{"id":"https://openalex.org/keywords/memory-architecture","display_name":"Memory architecture","score":0.4453646242618561},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.3355993926525116},{"id":"https://openalex.org/keywords/wavelet-transform","display_name":"Wavelet transform","score":0.2533062994480133},{"id":"https://openalex.org/keywords/wavelet","display_name":"Wavelet","score":0.2526513636112213},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.22709333896636963},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.17617937922477722},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.136710524559021},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.08584326505661011}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7311172485351562},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.5294382572174072},{"id":"https://openalex.org/C46286280","wikidata":"https://www.wikidata.org/wiki/Q2414958","display_name":"Discrete wavelet transform","level":4,"score":0.5049269795417786},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.49157723784446716},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.46643972396850586},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.4544423818588257},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.4490257203578949},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.44716769456863403},{"id":"https://openalex.org/C2779602883","wikidata":"https://www.wikidata.org/wiki/Q15544750","display_name":"Memory architecture","level":2,"score":0.4453646242618561},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3355993926525116},{"id":"https://openalex.org/C196216189","wikidata":"https://www.wikidata.org/wiki/Q2867","display_name":"Wavelet transform","level":3,"score":0.2533062994480133},{"id":"https://openalex.org/C47432892","wikidata":"https://www.wikidata.org/wiki/Q831390","display_name":"Wavelet","level":2,"score":0.2526513636112213},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.22709333896636963},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.17617937922477722},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.136710524559021},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.08584326505661011},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas.2015.7168999","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2015.7168999","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.4099999964237213,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W2005914095","https://openalex.org/W2015370045","https://openalex.org/W2027464257","https://openalex.org/W2078240618","https://openalex.org/W2107388576","https://openalex.org/W2132984323","https://openalex.org/W2138453916","https://openalex.org/W2154552526","https://openalex.org/W3148406369","https://openalex.org/W4251101141"],"related_works":["https://openalex.org/W3014521742","https://openalex.org/W2617868873","https://openalex.org/W3204141294","https://openalex.org/W4386230336","https://openalex.org/W4306968100","https://openalex.org/W2464627195","https://openalex.org/W2171986175","https://openalex.org/W2089791793","https://openalex.org/W2038858740","https://openalex.org/W1491218245"],"abstract_inverted_index":{"Unlike":[0],"the":[1,6,11,24,29,32,46,51,56,61,89,100,103,112,124,144],"existing":[2,52,146],"designs":[3],"that":[4],"improve":[5],"memory":[7,13,25,48,72,114],"efficiency":[8,26,49],"by":[9,27],"reducing":[10,28],"on-chip":[12,33],"words,":[14],"we":[15,54],"propose":[16],"a":[17,108,136],"memory-efficient":[18,40],"2-D":[19,41,85],"DWT":[20,42,86],"architecture":[21],"which":[22,44],"improves":[23],"wordlength":[30],"of":[31,67,94,102,111,116,141],"memory.":[34],"Based":[35],"on":[36],"our":[37],"recently":[38],"proposed":[39],"architecture,":[43],"achieves":[45],"highest":[47],"among":[50],"designs,":[53],"analyze":[55],"dynamic":[57],"range":[58],"and":[59,83,87,120],"optimize":[60,88],"required":[62],"integer":[63],"bit":[64,91],"(IB)":[65],"width":[66,93],"every":[68,95],"internal":[69,96],"signal":[70,97],"for":[71,80],"reduction.":[73],"We":[74],"construct":[75],"an":[76],"architecture-specific":[77],"accuracy":[78],"model":[79],"both":[81],"9/7":[82],"5/3":[84],"factional":[90],"(FB)":[92],"without":[98],"sacrificing":[99],"precision":[101],"output.":[104],"Theoretical":[105],"estimation":[106],"shows":[107],"17.5%":[109],"reduction":[110],"temporal":[113],"regardless":[115],"input":[117],"image":[118],"size":[119],"throughput.":[121],"In":[122],"addition,":[123],"arithmetic":[125],"resource":[126],"is":[127],"reduced.":[128],"The":[129],"synthesis":[130],"results":[131],"in":[132],"90-nm":[133],"CMOS":[134],"show":[135],"better":[137],"area-delay":[138],"product":[139],"(ADP)":[140],"25.1%":[142],"over":[143],"best":[145],"design.":[147]},"counts_by_year":[{"year":2015,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}