{"id":"https://openalex.org/W1545797807","doi":"https://doi.org/10.1109/iscas.2015.7168901","title":"A memory-efficient NoC system for OpenCL many-core platform","display_name":"A memory-efficient NoC system for OpenCL many-core platform","publication_year":2015,"publication_date":"2015-05-01","ids":{"openalex":"https://openalex.org/W1545797807","doi":"https://doi.org/10.1109/iscas.2015.7168901","mag":"1545797807"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2015.7168901","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2015.7168901","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5039923260","display_name":"Chien-Hsuan Yen","orcid":null},"institutions":[{"id":"https://openalex.org/I91807558","display_name":"National Cheng Kung University","ror":"https://ror.org/01b8kcc49","country_code":"TW","type":"education","lineage":["https://openalex.org/I91807558"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Chien-Hsuan Yen","raw_affiliation_strings":["Inst. of Computer & Communication Engineering, National Cheng Kung University, Tainan, Taiwan, R.O.C","Institute of Computer and Communication Engineering, National Cheng-Kung University, Tainan, Taiwan, R.O.C"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Inst. of Computer & Communication Engineering, National Cheng Kung University, Tainan, Taiwan, R.O.C","institution_ids":["https://openalex.org/I91807558"]},{"raw_affiliation_string":"Institute of Computer and Communication Engineering, National Cheng-Kung University, Tainan, Taiwan, R.O.C","institution_ids":["https://openalex.org/I91807558"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5111582905","display_name":"Chung\u2010Ho Chen","orcid":null},"institutions":[{"id":"https://openalex.org/I91807558","display_name":"National Cheng Kung University","ror":"https://ror.org/01b8kcc49","country_code":"TW","type":"education","lineage":["https://openalex.org/I91807558"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Chung-Ho Chen","raw_affiliation_strings":["Inst. of Computer & Communication Engineering, National Cheng Kung University, Tainan, Taiwan, R.O.C","Institute of Computer and Communication Engineering, National Cheng-Kung University, Tainan, Taiwan, R.O.C"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Inst. of Computer & Communication Engineering, National Cheng Kung University, Tainan, Taiwan, R.O.C","institution_ids":["https://openalex.org/I91807558"]},{"raw_affiliation_string":"Institute of Computer and Communication Engineering, National Cheng-Kung University, Tainan, Taiwan, R.O.C","institution_ids":["https://openalex.org/I91807558"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5103184352","display_name":"Kuan\u2010Chung Chen","orcid":"https://orcid.org/0000-0002-9699-2993"},"institutions":[{"id":"https://openalex.org/I91807558","display_name":"National Cheng Kung University","ror":"https://ror.org/01b8kcc49","country_code":"TW","type":"education","lineage":["https://openalex.org/I91807558"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Kuan-Chung Chen","raw_affiliation_strings":["Inst. of Computer & Communication Engineering, National Cheng Kung University, Tainan, Taiwan, R.O.C","Institute of Computer and Communication Engineering, National Cheng-Kung University, Tainan, Taiwan, R.O.C"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Inst. of Computer & Communication Engineering, National Cheng Kung University, Tainan, Taiwan, R.O.C","institution_ids":["https://openalex.org/I91807558"]},{"raw_affiliation_string":"Institute of Computer and Communication Engineering, National Cheng-Kung University, Tainan, Taiwan, R.O.C","institution_ids":["https://openalex.org/I91807558"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.7013,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.73818441,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"1386","last_page":"1389"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9944000244140625,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9858999848365784,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8669347167015076},{"id":"https://openalex.org/keywords/memory-controller","display_name":"Memory controller","score":0.7101746797561646},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.6350266337394714},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5402542948722839},{"id":"https://openalex.org/keywords/non-uniform-memory-access","display_name":"Non-uniform memory access","score":0.5103301405906677},{"id":"https://openalex.org/keywords/extended-memory","display_name":"Extended memory","score":0.5016963481903076},{"id":"https://openalex.org/keywords/registered-memory","display_name":"Registered memory","score":0.4856935441493988},{"id":"https://openalex.org/keywords/scheduling","display_name":"Scheduling (production processes)","score":0.46322348713874817},{"id":"https://openalex.org/keywords/uniform-memory-access","display_name":"Uniform memory access","score":0.4427725076675415},{"id":"https://openalex.org/keywords/network-packet","display_name":"Network packet","score":0.41458845138549805},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4133032560348511},{"id":"https://openalex.org/keywords/interleaved-memory","display_name":"Interleaved memory","score":0.41139256954193115},{"id":"https://openalex.org/keywords/memory-management","display_name":"Memory management","score":0.4080023765563965},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3533306121826172},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.26360830664634705},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.17826035618782043},{"id":"https://openalex.org/keywords/overlay","display_name":"Overlay","score":0.16589972376823425},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.15303125977516174}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8669347167015076},{"id":"https://openalex.org/C100800780","wikidata":"https://www.wikidata.org/wiki/Q1175867","display_name":"Memory controller","level":3,"score":0.7101746797561646},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.6350266337394714},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5402542948722839},{"id":"https://openalex.org/C133371097","wikidata":"https://www.wikidata.org/wiki/Q868014","display_name":"Non-uniform memory access","level":5,"score":0.5103301405906677},{"id":"https://openalex.org/C171675096","wikidata":"https://www.wikidata.org/wiki/Q1143380","display_name":"Extended memory","level":4,"score":0.5016963481903076},{"id":"https://openalex.org/C93446704","wikidata":"https://www.wikidata.org/wiki/Q449328","display_name":"Registered memory","level":3,"score":0.4856935441493988},{"id":"https://openalex.org/C206729178","wikidata":"https://www.wikidata.org/wiki/Q2271896","display_name":"Scheduling (production processes)","level":2,"score":0.46322348713874817},{"id":"https://openalex.org/C51290061","wikidata":"https://www.wikidata.org/wiki/Q1936765","display_name":"Uniform memory access","level":4,"score":0.4427725076675415},{"id":"https://openalex.org/C158379750","wikidata":"https://www.wikidata.org/wiki/Q214111","display_name":"Network packet","level":2,"score":0.41458845138549805},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4133032560348511},{"id":"https://openalex.org/C63511323","wikidata":"https://www.wikidata.org/wiki/Q908936","display_name":"Interleaved memory","level":4,"score":0.41139256954193115},{"id":"https://openalex.org/C176649486","wikidata":"https://www.wikidata.org/wiki/Q2308807","display_name":"Memory management","level":3,"score":0.4080023765563965},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3533306121826172},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.26360830664634705},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.17826035618782043},{"id":"https://openalex.org/C136085584","wikidata":"https://www.wikidata.org/wiki/Q910289","display_name":"Overlay","level":2,"score":0.16589972376823425},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.15303125977516174},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C21547014","wikidata":"https://www.wikidata.org/wiki/Q1423657","display_name":"Operations management","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas.2015.7168901","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2015.7168901","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W1501077214","https://openalex.org/W1964963116","https://openalex.org/W2040566380","https://openalex.org/W2074679730","https://openalex.org/W2095314640","https://openalex.org/W2098156582","https://openalex.org/W2101940411","https://openalex.org/W2115172404","https://openalex.org/W3140062895","https://openalex.org/W6630005587"],"related_works":["https://openalex.org/W2155373950","https://openalex.org/W2587873888","https://openalex.org/W3029446734","https://openalex.org/W1707075782","https://openalex.org/W2782503170","https://openalex.org/W2041174925","https://openalex.org/W3108993429","https://openalex.org/W4233816696","https://openalex.org/W2903168712","https://openalex.org/W2047684617"],"abstract_inverted_index":{"We":[0,46],"present":[1],"a":[2,48,55,58,68,80],"memory-efficient":[3,49],"NoC":[4,50,95],"system":[5,51,98],"for":[6,62],"OpenCL":[7,13],"many-core":[8,18,44],"platforms.":[9],"By":[10],"offloading":[11],"the":[12,17,23,31,34,38,43,91,94,105],"kernel":[14],"programs":[15],"into":[16],"processor,":[19],"we":[20],"reveal":[21],"that":[22,79],"memory":[24,69,82,97,106],"contention":[25,108],"overheads":[26],"have":[27],"dramatically":[28],"increased":[29],"with":[30,71],"scaling":[32],"of":[33,42,93],"system,":[35],"resulting":[36],"to":[37,100],"poor":[39],"performance":[40,92],"scalability":[41],"system.":[45],"explore":[47],"design":[52],"which":[53],"includes":[54],"mesh":[56],"network,":[57],"hybrid":[59],"network":[60],"interface":[61],"packet":[63],"composition":[64],"and":[65,67,85,96],"decomposition,":[66],"controller":[70,107],"access":[72,83],"scheduling":[73,84],"capability.":[74],"Our":[75],"experimental":[76],"results":[77],"show":[78],"simple":[81],"caching":[86],"approach":[87],"can":[88],"easily":[89],"boost":[90],"up":[99],"20":[101],"percent":[102],"by":[103],"eliminating":[104],"problem.":[109]},"counts_by_year":[{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}