{"id":"https://openalex.org/W1533800124","doi":"https://doi.org/10.1109/iscas.2015.7168634","title":"Continuous time delta-sigma modulator with an embedded passive low pass filter","display_name":"Continuous time delta-sigma modulator with an embedded passive low pass filter","publication_year":2015,"publication_date":"2015-05-01","ids":{"openalex":"https://openalex.org/W1533800124","doi":"https://doi.org/10.1109/iscas.2015.7168634","mag":"1533800124"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2015.7168634","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2015.7168634","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5004382239","display_name":"Changsok Han","orcid":null},"institutions":[{"id":"https://openalex.org/I33213144","display_name":"University of Florida","ror":"https://ror.org/02y3ad647","country_code":"US","type":"education","lineage":["https://openalex.org/I33213144"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Changsok Han","raw_affiliation_strings":["Department of electrical and computer engineering University of Florida Gainesville, Florida","Dept. of Electrical and Computer Engineering, University of Florida, Gainesville, Florida 32611"],"affiliations":[{"raw_affiliation_string":"Department of electrical and computer engineering University of Florida Gainesville, Florida","institution_ids":["https://openalex.org/I33213144"]},{"raw_affiliation_string":"Dept. of Electrical and Computer Engineering, University of Florida, Gainesville, Florida 32611","institution_ids":["https://openalex.org/I33213144"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5071432833","display_name":"Nima Maghari","orcid":"https://orcid.org/0000-0002-9168-5142"},"institutions":[{"id":"https://openalex.org/I33213144","display_name":"University of Florida","ror":"https://ror.org/02y3ad647","country_code":"US","type":"education","lineage":["https://openalex.org/I33213144"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Nima Maghari","raw_affiliation_strings":["Department of electrical and computer engineering University of Florida Gainesville, Florida","Dept. of Electrical and Computer Engineering, University of Florida, Gainesville, Florida 32611"],"affiliations":[{"raw_affiliation_string":"Department of electrical and computer engineering University of Florida Gainesville, Florida","institution_ids":["https://openalex.org/I33213144"]},{"raw_affiliation_string":"Dept. of Electrical and Computer Engineering, University of Florida, Gainesville, Florida 32611","institution_ids":["https://openalex.org/I33213144"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5004382239"],"corresponding_institution_ids":["https://openalex.org/I33213144"],"apc_list":null,"apc_paid":null,"fwci":0.3541,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.60616042,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":95},"biblio":{"volume":null,"issue":null,"first_page":"317","last_page":"320"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9980000257492065,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/delta-sigma-modulation","display_name":"Delta-sigma modulation","score":0.8547923564910889},{"id":"https://openalex.org/keywords/integrator","display_name":"Integrator","score":0.7848010063171387},{"id":"https://openalex.org/keywords/passive-integrator-circuit","display_name":"Passive integrator circuit","score":0.6837565302848816},{"id":"https://openalex.org/keywords/cadence","display_name":"Cadence","score":0.6724915504455566},{"id":"https://openalex.org/keywords/control-theory","display_name":"Control theory (sociology)","score":0.6425085067749023},{"id":"https://openalex.org/keywords/filter","display_name":"Filter (signal processing)","score":0.5901526212692261},{"id":"https://openalex.org/keywords/matlab","display_name":"MATLAB","score":0.5795063972473145},{"id":"https://openalex.org/keywords/low-pass-filter","display_name":"Low-pass filter","score":0.5450778603553772},{"id":"https://openalex.org/keywords/band-pass-filter","display_name":"Band-pass filter","score":0.526292622089386},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5195953845977783},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.47538459300994873},{"id":"https://openalex.org/keywords/active-filter","display_name":"Active filter","score":0.46052274107933044},{"id":"https://openalex.org/keywords/butterworth-filter","display_name":"Butterworth filter","score":0.4525548219680786},{"id":"https://openalex.org/keywords/prototype-filter","display_name":"Prototype filter","score":0.40319687128067017},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.3235374689102173},{"id":"https://openalex.org/keywords/rc-circuit","display_name":"RC circuit","score":0.25692394375801086},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.23560336232185364},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.12239059805870056},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.11819669604301453},{"id":"https://openalex.org/keywords/capacitor","display_name":"Capacitor","score":0.10864579677581787},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.060441553592681885}],"concepts":[{"id":"https://openalex.org/C68754193","wikidata":"https://www.wikidata.org/wiki/Q1184820","display_name":"Delta-sigma modulation","level":3,"score":0.8547923564910889},{"id":"https://openalex.org/C79518650","wikidata":"https://www.wikidata.org/wiki/Q2081431","display_name":"Integrator","level":3,"score":0.7848010063171387},{"id":"https://openalex.org/C30839866","wikidata":"https://www.wikidata.org/wiki/Q918242","display_name":"Passive integrator circuit","level":5,"score":0.6837565302848816},{"id":"https://openalex.org/C2777125575","wikidata":"https://www.wikidata.org/wiki/Q14088448","display_name":"Cadence","level":2,"score":0.6724915504455566},{"id":"https://openalex.org/C47446073","wikidata":"https://www.wikidata.org/wiki/Q5165890","display_name":"Control theory (sociology)","level":3,"score":0.6425085067749023},{"id":"https://openalex.org/C106131492","wikidata":"https://www.wikidata.org/wiki/Q3072260","display_name":"Filter (signal processing)","level":2,"score":0.5901526212692261},{"id":"https://openalex.org/C2780365114","wikidata":"https://www.wikidata.org/wiki/Q169478","display_name":"MATLAB","level":2,"score":0.5795063972473145},{"id":"https://openalex.org/C44682112","wikidata":"https://www.wikidata.org/wiki/Q918242","display_name":"Low-pass filter","level":3,"score":0.5450778603553772},{"id":"https://openalex.org/C147788027","wikidata":"https://www.wikidata.org/wiki/Q2718101","display_name":"Band-pass filter","level":2,"score":0.526292622089386},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5195953845977783},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.47538459300994873},{"id":"https://openalex.org/C85899133","wikidata":"https://www.wikidata.org/wiki/Q557211","display_name":"Active filter","level":3,"score":0.46052274107933044},{"id":"https://openalex.org/C70757512","wikidata":"https://www.wikidata.org/wiki/Q1018162","display_name":"Butterworth filter","level":5,"score":0.4525548219680786},{"id":"https://openalex.org/C175742284","wikidata":"https://www.wikidata.org/wiki/Q1415537","display_name":"Prototype filter","level":4,"score":0.40319687128067017},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3235374689102173},{"id":"https://openalex.org/C39394816","wikidata":"https://www.wikidata.org/wiki/Q939318","display_name":"RC circuit","level":4,"score":0.25692394375801086},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.23560336232185364},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.12239059805870056},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.11819669604301453},{"id":"https://openalex.org/C52192207","wikidata":"https://www.wikidata.org/wiki/Q5322","display_name":"Capacitor","level":3,"score":0.10864579677581787},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.060441553592681885},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.0},{"id":"https://openalex.org/C2775924081","wikidata":"https://www.wikidata.org/wiki/Q55608371","display_name":"Control (management)","level":2,"score":0.0},{"id":"https://openalex.org/C31972630","wikidata":"https://www.wikidata.org/wiki/Q844240","display_name":"Computer vision","level":1,"score":0.0},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas.2015.7168634","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2015.7168634","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W605564925","https://openalex.org/W1503163272","https://openalex.org/W1988727019","https://openalex.org/W2066318884","https://openalex.org/W2105712717","https://openalex.org/W2106008098","https://openalex.org/W2108622765","https://openalex.org/W2110412919","https://openalex.org/W2115953420","https://openalex.org/W2142156350","https://openalex.org/W2154246288","https://openalex.org/W2171563152","https://openalex.org/W4301627548"],"related_works":["https://openalex.org/W2481624947","https://openalex.org/W1492592725","https://openalex.org/W2150714587","https://openalex.org/W4385692266","https://openalex.org/W2323335032","https://openalex.org/W4245877442","https://openalex.org/W2065462772","https://openalex.org/W2142603601","https://openalex.org/W1982411667","https://openalex.org/W2065352363"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"a":[3,28],"methodology":[4],"to":[5,63,70,90],"improve":[6],"filtering":[7,62],"in":[8,66],"continuous":[9],"time":[10],"delta-sigma":[11,25],"modulators":[12],"(CTDSMs).":[13],"A":[14],"first":[15,60],"order":[16,61],"passive":[17],"low":[18],"pass":[19],"filter":[20,43],"is":[21,44],"incorporated":[22],"into":[23],"the":[24,32,42,76,80,92,95],"loop":[26],"with":[27,41],"small":[29],"modification":[30],"of":[31,79,94],"existing":[33],"active":[34,49],"RC":[35],"integrator":[36],"configuration.":[37],"The":[38,54],"delay":[39],"associated":[40],"compensated":[45],"without":[46],"any":[47],"additional":[48,59],"components":[50],"such":[51],"as":[52],"opamps.":[53],"proposed":[55,96],"scheme":[56],"provides":[57],"an":[58,67],"CTDSMs,":[64],"resulting":[65],"increased":[68],"immunity":[69],"out-of-band":[71],"blockers.":[72],"Also,":[73],"it":[74],"relaxes":[75],"design":[77],"complexity":[78],"preceding":[81],"filters.":[82],"Detailed":[83],"Cadence":[84],"and":[85],"Matlab":[86],"simulations":[87],"are":[88],"provided":[89],"prove":[91],"operation":[93],"scheme.":[97]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}