{"id":"https://openalex.org/W1599544232","doi":"https://doi.org/10.1109/iscas.2015.7168628","title":"A 0.5-V 1.28-MS/s 10-bit SAR ADC with switching detect logic","display_name":"A 0.5-V 1.28-MS/s 10-bit SAR ADC with switching detect logic","publication_year":2015,"publication_date":"2015-05-01","ids":{"openalex":"https://openalex.org/W1599544232","doi":"https://doi.org/10.1109/iscas.2015.7168628","mag":"1599544232"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2015.7168628","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2015.7168628","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5074480992","display_name":"Yuwei Cheng","orcid":"https://orcid.org/0000-0002-6819-2075"},"institutions":[{"id":"https://openalex.org/I25846049","display_name":"National Tsing Hua University","ror":"https://ror.org/00zdnkx70","country_code":"TW","type":"education","lineage":["https://openalex.org/I25846049"]}],"countries":["TW"],"is_corresponding":true,"raw_author_name":"Yu-Wei Cheng","raw_affiliation_strings":["The Department of Electrical Engineering, National Tsing Hua University, Hsin-Chu, Taiwan"],"affiliations":[{"raw_affiliation_string":"The Department of Electrical Engineering, National Tsing Hua University, Hsin-Chu, Taiwan","institution_ids":["https://openalex.org/I25846049"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5044259295","display_name":"Kea\u2010Tiong Tang","orcid":"https://orcid.org/0000-0002-9689-1236"},"institutions":[{"id":"https://openalex.org/I25846049","display_name":"National Tsing Hua University","ror":"https://ror.org/00zdnkx70","country_code":"TW","type":"education","lineage":["https://openalex.org/I25846049"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Kea-Tiong Tang","raw_affiliation_strings":["The Department of Electrical Engineering, National Tsing Hua University, Hsin-Chu, Taiwan"],"affiliations":[{"raw_affiliation_string":"The Department of Electrical Engineering, National Tsing Hua University, Hsin-Chu, Taiwan","institution_ids":["https://openalex.org/I25846049"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5074480992"],"corresponding_institution_ids":["https://openalex.org/I25846049"],"apc_list":null,"apc_paid":null,"fwci":0.5311,"has_fulltext":false,"cited_by_count":10,"citation_normalized_percentile":{"value":0.65958432,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":"30","issue":null,"first_page":"293","last_page":"296"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11601","display_name":"Neuroscience and Neural Engineering","score":0.9955000281333923,"subfield":{"id":"https://openalex.org/subfields/2804","display_name":"Cellular and Molecular Neuroscience"},"field":{"id":"https://openalex.org/fields/28","display_name":"Neuroscience"},"domain":{"id":"https://openalex.org/domains/1","display_name":"Life Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/successive-approximation-adc","display_name":"Successive approximation ADC","score":0.9029625058174133},{"id":"https://openalex.org/keywords/effective-number-of-bits","display_name":"Effective number of bits","score":0.8555548191070557},{"id":"https://openalex.org/keywords/capacitor","display_name":"Capacitor","score":0.6242928504943848},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5387208461761475},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.5301870703697205},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5169333815574646},{"id":"https://openalex.org/keywords/bit","display_name":"Bit (key)","score":0.4434853196144104},{"id":"https://openalex.org/keywords/shaping","display_name":"Shaping","score":0.43222182989120483},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4286383390426636},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.33567506074905396},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.2767401337623596},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2162826657295227},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.14253771305084229}],"concepts":[{"id":"https://openalex.org/C60154766","wikidata":"https://www.wikidata.org/wiki/Q2650458","display_name":"Successive approximation ADC","level":4,"score":0.9029625058174133},{"id":"https://openalex.org/C16671190","wikidata":"https://www.wikidata.org/wiki/Q505579","display_name":"Effective number of bits","level":3,"score":0.8555548191070557},{"id":"https://openalex.org/C52192207","wikidata":"https://www.wikidata.org/wiki/Q5322","display_name":"Capacitor","level":3,"score":0.6242928504943848},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5387208461761475},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.5301870703697205},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5169333815574646},{"id":"https://openalex.org/C117011727","wikidata":"https://www.wikidata.org/wiki/Q1278488","display_name":"Bit (key)","level":2,"score":0.4434853196144104},{"id":"https://openalex.org/C142311740","wikidata":"https://www.wikidata.org/wiki/Q1066177","display_name":"Shaping","level":2,"score":0.43222182989120483},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4286383390426636},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.33567506074905396},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.2767401337623596},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2162826657295227},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.14253771305084229},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas.2015.7168628","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2015.7168628","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.7699999809265137}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W1988720191","https://openalex.org/W1998486907","https://openalex.org/W2035956092","https://openalex.org/W2050955458","https://openalex.org/W2067697693","https://openalex.org/W2070631620","https://openalex.org/W2079636668","https://openalex.org/W2108619270","https://openalex.org/W2122073426","https://openalex.org/W2131792101","https://openalex.org/W6647410026"],"related_works":["https://openalex.org/W2896514336","https://openalex.org/W3216962587","https://openalex.org/W2003734039","https://openalex.org/W4292071990","https://openalex.org/W2905521207","https://openalex.org/W2548554782","https://openalex.org/W340251908","https://openalex.org/W1997284295","https://openalex.org/W2511822798","https://openalex.org/W4392033636"],"abstract_inverted_index":{"This":[0,72],"paper":[1],"presents":[2],"a":[3,11],"10-bit":[4],"successive":[5],"approximation":[6],"register":[7],"(SAR)":[8],"ADC":[9,49,74],"with":[10,77],"detect":[12,20],"logic":[13,21],"for":[14],"DAC":[15],"switching.":[16],"The":[17,48],"proposed":[18],"switching":[19],"can":[22],"avoid":[23],"switch":[24],"power":[25],"wasted":[26],"and":[27,56,63,68,84],"reduce":[28],"the":[29,35,42,78],"impact":[30],"of":[31,45,66,89],"capacitor":[32],"mismatch":[33],"from":[34],"layout":[36],"parasitic":[37],"as":[38,40],"well":[39],"improve":[41],"resolution":[43],"performance":[44,65],"SAR":[46,73],"ADC.":[47],"consumes":[50],"3":[51],"uW":[52],"at":[53],"0.5-V":[54],"supply":[55],"1.28-MS/s":[57],"sampling":[58],"rate,":[59],"achieves":[60],"high":[61],"ENOB":[62],"FOM":[64],"9.95-bit":[67],"2.36":[69],"fJ/conversion-step,":[70],"respectively.":[71],"is":[75],"fabricated":[76],"TSMC":[79],"90":[80],"nm":[81],"CMOS":[82],"process":[83],"occupies":[85],"an":[86],"active":[87],"area":[88],"238\u03bcm\u00d7200\u03bcm.":[90]},"counts_by_year":[{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":3},{"year":2020,"cited_by_count":2},{"year":2019,"cited_by_count":1},{"year":2016,"cited_by_count":3}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
