{"id":"https://openalex.org/W1588593708","doi":"https://doi.org/10.1109/iscas.2015.7168583","title":"An embedded probabilistic extraction unit for on-chip jitter measurements","display_name":"An embedded probabilistic extraction unit for on-chip jitter measurements","publication_year":2015,"publication_date":"2015-05-01","ids":{"openalex":"https://openalex.org/W1588593708","doi":"https://doi.org/10.1109/iscas.2015.7168583","mag":"1588593708"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2015.7168583","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2015.7168583","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5044118206","display_name":"Steven Bielby","orcid":null},"institutions":[{"id":"https://openalex.org/I5023651","display_name":"McGill University","ror":"https://ror.org/01pxwe438","country_code":"CA","type":"education","lineage":["https://openalex.org/I5023651"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Steven Bielby","raw_affiliation_strings":["Integrated Microsystems Laboratory, McGill University, Montreal, Canada","Integrated Microsystems Laboratory McGill University Montreal, Canada"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Integrated Microsystems Laboratory, McGill University, Montreal, Canada","institution_ids":["https://openalex.org/I5023651"]},{"raw_affiliation_string":"Integrated Microsystems Laboratory McGill University Montreal, Canada","institution_ids":["https://openalex.org/I5023651"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5083312864","display_name":"Gordon W. Roberts","orcid":"https://orcid.org/0000-0002-4880-0272"},"institutions":[{"id":"https://openalex.org/I5023651","display_name":"McGill University","ror":"https://ror.org/01pxwe438","country_code":"CA","type":"education","lineage":["https://openalex.org/I5023651"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Gordon W. Roberts","raw_affiliation_strings":["Integrated Microsystems Laboratory, McGill University, Montreal, Canada","Integrated Microsystems Laboratory McGill University Montreal, Canada"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Integrated Microsystems Laboratory, McGill University, Montreal, Canada","institution_ids":["https://openalex.org/I5023651"]},{"raw_affiliation_string":"Integrated Microsystems Laboratory McGill University Montreal, Canada","institution_ids":["https://openalex.org/I5023651"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I5023651"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"113","last_page":"116"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.7308132648468018},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6985100507736206},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6362195611000061},{"id":"https://openalex.org/keywords/ibm","display_name":"IBM","score":0.6108505129814148},{"id":"https://openalex.org/keywords/probabilistic-logic","display_name":"Probabilistic logic","score":0.6037760376930237},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.5736072659492493},{"id":"https://openalex.org/keywords/built-in-self-test","display_name":"Built-in self-test","score":0.48122525215148926},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.4451368451118469},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4356473386287689},{"id":"https://openalex.org/keywords/automatic-test-pattern-generation","display_name":"Automatic test pattern generation","score":0.4302677512168884},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4093171954154968},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.384945809841156},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.22116583585739136},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.20777297019958496},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.12531781196594238}],"concepts":[{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.7308132648468018},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6985100507736206},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6362195611000061},{"id":"https://openalex.org/C70388272","wikidata":"https://www.wikidata.org/wiki/Q5968558","display_name":"IBM","level":2,"score":0.6108505129814148},{"id":"https://openalex.org/C49937458","wikidata":"https://www.wikidata.org/wiki/Q2599292","display_name":"Probabilistic logic","level":2,"score":0.6037760376930237},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.5736072659492493},{"id":"https://openalex.org/C2780980493","wikidata":"https://www.wikidata.org/wiki/Q181142","display_name":"Built-in self-test","level":2,"score":0.48122525215148926},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.4451368451118469},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4356473386287689},{"id":"https://openalex.org/C17626397","wikidata":"https://www.wikidata.org/wiki/Q837455","display_name":"Automatic test pattern generation","level":3,"score":0.4302677512168884},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4093171954154968},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.384945809841156},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.22116583585739136},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.20777297019958496},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.12531781196594238},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C171250308","wikidata":"https://www.wikidata.org/wiki/Q11468","display_name":"Nanotechnology","level":1,"score":0.0},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas.2015.7168583","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2015.7168583","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":6,"referenced_works":["https://openalex.org/W1973596329","https://openalex.org/W2081065588","https://openalex.org/W2084128131","https://openalex.org/W2130122989","https://openalex.org/W2188438618","https://openalex.org/W6686938785"],"related_works":["https://openalex.org/W2121182846","https://openalex.org/W2155789024","https://openalex.org/W2104478015","https://openalex.org/W4230343699","https://openalex.org/W1958365305","https://openalex.org/W2154529098","https://openalex.org/W2137475190","https://openalex.org/W2109319621","https://openalex.org/W2137702935","https://openalex.org/W2150985363"],"abstract_inverted_index":{"As":[0],"circuits":[1],"become":[2],"increasingly":[3],"complex":[4],"and":[5,15,54],"testing":[6],"time":[7],"continues":[8],"to":[9,18,23,31],"increase,":[10],"it":[11],"is":[12,28],"becoming":[13],"more":[14,16],"important":[17],"use":[19],"built-in":[20],"self-test":[21],"techniques":[22],"ensure":[24],"that":[25],"the":[26,60],"circuit":[27],"working":[29],"according":[30],"its":[32],"data":[33],"sheet":[34],"specifications.":[35],"This":[36],"paper":[37],"presents":[38],"an":[39,44],"embedded":[40],"test":[41,57],"instrument":[42],"in":[43],"IBM":[45],"130":[46],"nm":[47],"CMOS":[48],"technology,":[49],"which":[50],"allows":[51],"for":[52],"quick":[53],"easy":[55],"probabilistic":[56],"evaluation":[58],"of":[59,63],"bit-error":[61],"ratio":[62],"a":[64],"device-under-test.":[65]},"counts_by_year":[{"year":2020,"cited_by_count":1},{"year":2018,"cited_by_count":2}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}