{"id":"https://openalex.org/W2025637081","doi":"https://doi.org/10.1109/iscas.2014.6865747","title":"&amp;#x201C;Swimming pool&amp;#x201D;-like distributed architecture for clock generation in large many-core SoC","display_name":"&amp;#x201C;Swimming pool&amp;#x201D;-like distributed architecture for clock generation in large many-core SoC","publication_year":2014,"publication_date":"2014-06-01","ids":{"openalex":"https://openalex.org/W2025637081","doi":"https://doi.org/10.1109/iscas.2014.6865747","mag":"2025637081"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2014.6865747","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2014.6865747","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://hal.sorbonne-universite.fr/hal-01080071","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100898555","display_name":"Chuan Shan","orcid":null},"institutions":[{"id":"https://openalex.org/I204730241","display_name":"Universit\u00e9 Paris Cit\u00e9","ror":"https://ror.org/05f82e368","country_code":"FR","type":"education","lineage":["https://openalex.org/I204730241"]},{"id":"https://openalex.org/I39804081","display_name":"Sorbonne Universit\u00e9","ror":"https://ror.org/02en5vm52","country_code":"FR","type":"education","lineage":["https://openalex.org/I39804081"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Chuan Shan","raw_affiliation_strings":["Sorbonne University, UMPC University of Paris VI, Lip6, Paris, France","Lip6, UMPC Univ. of Paris VI, Paris, France"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Sorbonne University, UMPC University of Paris VI, Lip6, Paris, France","institution_ids":["https://openalex.org/I204730241","https://openalex.org/I39804081"]},{"raw_affiliation_string":"Lip6, UMPC Univ. of Paris VI, Paris, France","institution_ids":["https://openalex.org/I39804081"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5112858873","display_name":"Fran\u00e7ois Anceau","orcid":null},"institutions":[{"id":"https://openalex.org/I204730241","display_name":"Universit\u00e9 Paris Cit\u00e9","ror":"https://ror.org/05f82e368","country_code":"FR","type":"education","lineage":["https://openalex.org/I204730241"]},{"id":"https://openalex.org/I39804081","display_name":"Sorbonne Universit\u00e9","ror":"https://ror.org/02en5vm52","country_code":"FR","type":"education","lineage":["https://openalex.org/I39804081"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Francois Anceau","raw_affiliation_strings":["Sorbonne University, UMPC University of Paris VI, Lip6, Paris, France","Lip6, UMPC Univ. of Paris VI, Paris, France"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Sorbonne University, UMPC University of Paris VI, Lip6, Paris, France","institution_ids":["https://openalex.org/I204730241","https://openalex.org/I39804081"]},{"raw_affiliation_string":"Lip6, UMPC Univ. of Paris VI, Paris, France","institution_ids":["https://openalex.org/I39804081"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5032777255","display_name":"Dimitri Galayko","orcid":"https://orcid.org/0000-0002-7056-7489"},"institutions":[{"id":"https://openalex.org/I204730241","display_name":"Universit\u00e9 Paris Cit\u00e9","ror":"https://ror.org/05f82e368","country_code":"FR","type":"education","lineage":["https://openalex.org/I204730241"]},{"id":"https://openalex.org/I39804081","display_name":"Sorbonne Universit\u00e9","ror":"https://ror.org/02en5vm52","country_code":"FR","type":"education","lineage":["https://openalex.org/I39804081"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Dimitri Galayko","raw_affiliation_strings":["Sorbonne University, UMPC University of Paris VI, Lip6, Paris, France","Lip6, UMPC Univ. of Paris VI, Paris, France"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Sorbonne University, UMPC University of Paris VI, Lip6, Paris, France","institution_ids":["https://openalex.org/I204730241","https://openalex.org/I39804081"]},{"raw_affiliation_string":"Lip6, UMPC Univ. of Paris VI, Paris, France","institution_ids":["https://openalex.org/I39804081"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5000777718","display_name":"Eldar Zianbetov","orcid":null},"institutions":[{"id":"https://openalex.org/I204730241","display_name":"Universit\u00e9 Paris Cit\u00e9","ror":"https://ror.org/05f82e368","country_code":"FR","type":"education","lineage":["https://openalex.org/I204730241"]},{"id":"https://openalex.org/I39804081","display_name":"Sorbonne Universit\u00e9","ror":"https://ror.org/02en5vm52","country_code":"FR","type":"education","lineage":["https://openalex.org/I39804081"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Eldar Zianbetov","raw_affiliation_strings":["Sorbonne University, UMPC University of Paris VI, Lip6, Paris, France","Lip6, UMPC Univ. of Paris VI, Paris, France"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Sorbonne University, UMPC University of Paris VI, Lip6, Paris, France","institution_ids":["https://openalex.org/I204730241","https://openalex.org/I39804081"]},{"raw_affiliation_string":"Lip6, UMPC Univ. of Paris VI, Paris, France","institution_ids":["https://openalex.org/I39804081"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.552,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.58032037,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"2768","last_page":"2771"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/clock-generator","display_name":"Clock generator","score":0.7906160354614258},{"id":"https://openalex.org/keywords/asynchronous-communication","display_name":"Asynchronous communication","score":0.6384912729263306},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6226502656936646},{"id":"https://openalex.org/keywords/clock-synchronization","display_name":"Clock synchronization","score":0.6179330945014954},{"id":"https://openalex.org/keywords/master-clock","display_name":"Master clock","score":0.5872197151184082},{"id":"https://openalex.org/keywords/synchronization","display_name":"Synchronization (alternating current)","score":0.5857952833175659},{"id":"https://openalex.org/keywords/clock-drift","display_name":"Clock drift","score":0.47227439284324646},{"id":"https://openalex.org/keywords/synchronizer","display_name":"Synchronizer","score":0.4263409376144409},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3810339868068695},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.18879878520965576},{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.17415490746498108},{"id":"https://openalex.org/keywords/clock-signal","display_name":"Clock signal","score":0.1699625551700592},{"id":"https://openalex.org/keywords/channel","display_name":"Channel (broadcasting)","score":0.1395852267742157},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.11300429701805115},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.07638278603553772}],"concepts":[{"id":"https://openalex.org/C2778023540","wikidata":"https://www.wikidata.org/wiki/Q2164847","display_name":"Clock generator","level":4,"score":0.7906160354614258},{"id":"https://openalex.org/C151319957","wikidata":"https://www.wikidata.org/wiki/Q752739","display_name":"Asynchronous communication","level":2,"score":0.6384912729263306},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6226502656936646},{"id":"https://openalex.org/C129891060","wikidata":"https://www.wikidata.org/wiki/Q1513059","display_name":"Clock synchronization","level":4,"score":0.6179330945014954},{"id":"https://openalex.org/C65595194","wikidata":"https://www.wikidata.org/wiki/Q1000863","display_name":"Master clock","level":4,"score":0.5872197151184082},{"id":"https://openalex.org/C2778562939","wikidata":"https://www.wikidata.org/wiki/Q1298791","display_name":"Synchronization (alternating current)","level":3,"score":0.5857952833175659},{"id":"https://openalex.org/C155837451","wikidata":"https://www.wikidata.org/wiki/Q1069144","display_name":"Clock drift","level":5,"score":0.47227439284324646},{"id":"https://openalex.org/C66727535","wikidata":"https://www.wikidata.org/wiki/Q7662199","display_name":"Synchronizer","level":2,"score":0.4263409376144409},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3810339868068695},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.18879878520965576},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.17415490746498108},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.1699625551700592},{"id":"https://openalex.org/C127162648","wikidata":"https://www.wikidata.org/wiki/Q16858953","display_name":"Channel (broadcasting)","level":2,"score":0.1395852267742157},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.11300429701805115},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.07638278603553772}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/iscas.2014.6865747","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2014.6865747","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},{"id":"pmh:oai:HAL:hal-01080071v1","is_oa":true,"landing_page_url":"https://hal.sorbonne-universite.fr/hal-01080071","pdf_url":null,"source":{"id":"https://openalex.org/S4306402512","display_name":"HAL (Le Centre pour la Communication Scientifique Directe)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I1294671590","host_organization_name":"Centre National de la Recherche Scientifique","host_organization_lineage":["https://openalex.org/I1294671590"],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"{IEEE} International Symposium on Circuits and Systemss, {ISCAS} 2014, Jun 2014, Melbourne, Australia. pp.2768 - 2771, &#x27E8;10.1109/ISCAS.2014.6865747&#x27E9;","raw_type":"info:eu-repo/semantics/conferenceObject"}],"best_oa_location":{"id":"pmh:oai:HAL:hal-01080071v1","is_oa":true,"landing_page_url":"https://hal.sorbonne-universite.fr/hal-01080071","pdf_url":null,"source":{"id":"https://openalex.org/S4306402512","display_name":"HAL (Le Centre pour la Communication Scientifique Directe)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I1294671590","host_organization_name":"Centre National de la Recherche Scientifique","host_organization_lineage":["https://openalex.org/I1294671590"],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"{IEEE} International Symposium on Circuits and Systemss, {ISCAS} 2014, Jun 2014, Melbourne, Australia. pp.2768 - 2771, &#x27E8;10.1109/ISCAS.2014.6865747&#x27E9;","raw_type":"info:eu-repo/semantics/conferenceObject"},"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.4099999964237213}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W1561892995","https://openalex.org/W2009285406","https://openalex.org/W2026006738","https://openalex.org/W2095644119","https://openalex.org/W2097242029","https://openalex.org/W2099652299","https://openalex.org/W2104196799","https://openalex.org/W2118232269","https://openalex.org/W2121252299","https://openalex.org/W2135663303"],"related_works":["https://openalex.org/W3000741217","https://openalex.org/W3093058274","https://openalex.org/W2617460149","https://openalex.org/W1924044602","https://openalex.org/W1988298462","https://openalex.org/W2083095101","https://openalex.org/W2385806990","https://openalex.org/W2789675190","https://openalex.org/W2554056856","https://openalex.org/W2363416952"],"abstract_inverted_index":{"Synchronization":[0],"is":[1,17,74,109],"an":[2],"issue":[3],"of":[4,66,71],"significant":[5],"importance":[6],"in":[7,42,106,112,135],"large-scale,":[8],"distributed":[9,59],"and":[10,78,108,128],"high-speed":[11],"systems.":[12],"Traditional":[13],"globally":[14],"synchronous":[15,91],"approach":[16],"no":[18],"longer":[19],"viable":[20],"due":[21],"to":[22,80,87],"severe":[23],"wire":[24],"delay.":[25],"Solutions":[26],"such":[27,48],"as":[28,49],"\u201cGlobally":[29],"Asynchronous,":[30],"Locally":[31],"Synchronous":[32],"(GALS)\u201d":[33],"approaches":[34],"suffer":[35],"from":[36],"metastability":[37],"risk":[38],"limiting":[39],"their":[40],"use":[41],"many-core":[43],"SoC":[44],"for":[45,99],"critical":[46],"applications,":[47],"aerospace,":[50],"military":[51],"or":[52],"medical":[53],"equipment.":[54],"This":[55,82],"paper":[56],"presents":[57],"a":[58,64],"clock":[60,97,101,126],"generator":[61],"based":[62],"on":[63],"network":[65,95],"oscillators.":[67],"A":[68,93],"great":[69],"advantage":[70],"this":[72],"architecture":[73,83],"its":[75],"high":[76],"stability":[77],"immunity":[79],"perturbations.":[81],"also":[84],"makes":[85],"possible":[86],"design":[88,111],"large":[89],"fully":[90],"SoC.":[92],"10\u00d710":[94],"supplying":[96],"sources":[98],"100":[100],"domains":[102],"has":[103],"been":[104],"modeled":[105],"VHDL":[107],"under":[110],"silicon.":[113],"Simulation":[114],"results":[115],"show":[116],"\u00b1":[117,129],"40":[118],"ps":[119,131],"peak-to-peak":[120],"phase":[121],"error":[122],"between":[123,132],"two":[124,133],"neighboring":[125],"signals":[127],"50":[130],"clocks":[134],"distance.":[136]},"counts_by_year":[{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
