{"id":"https://openalex.org/W2076130311","doi":"https://doi.org/10.1109/iscas.2014.6865647","title":"A 400-MS/s 8-b 2-b/cycle SAR ADC with shared interpolator and alternative comparators","display_name":"A 400-MS/s 8-b 2-b/cycle SAR ADC with shared interpolator and alternative comparators","publication_year":2014,"publication_date":"2014-06-01","ids":{"openalex":"https://openalex.org/W2076130311","doi":"https://doi.org/10.1109/iscas.2014.6865647","mag":"2076130311"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2014.6865647","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2014.6865647","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5103543347","display_name":"Guoxian Dai","orcid":null},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]},{"id":"https://openalex.org/I4391767673","display_name":"State Key Laboratory of ASIC and System","ror":"https://ror.org/01mamgv83","country_code":null,"type":"facility","lineage":["https://openalex.org/I24943067","https://openalex.org/I4391767673"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Guoxian Dai","raw_affiliation_strings":["State Key Laboratory of ASIC and System, Fudan University, Shanghai, P.R China","State Key Lab. of ASIC & Syst. Fudan Univ., Shanghai, China"],"affiliations":[{"raw_affiliation_string":"State Key Laboratory of ASIC and System, Fudan University, Shanghai, P.R China","institution_ids":["https://openalex.org/I24943067"]},{"raw_affiliation_string":"State Key Lab. of ASIC & Syst. Fudan Univ., Shanghai, China","institution_ids":["https://openalex.org/I24943067","https://openalex.org/I4391767673"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5051205321","display_name":"Chixiao Chen","orcid":"https://orcid.org/0000-0002-5980-4236"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]},{"id":"https://openalex.org/I4391767673","display_name":"State Key Laboratory of ASIC and System","ror":"https://ror.org/01mamgv83","country_code":null,"type":"facility","lineage":["https://openalex.org/I24943067","https://openalex.org/I4391767673"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Chixiao Chen","raw_affiliation_strings":["State Key Laboratory of ASIC and System, Fudan University, Shanghai, P.R China","State Key Lab. of ASIC & Syst. Fudan Univ., Shanghai, China"],"affiliations":[{"raw_affiliation_string":"State Key Laboratory of ASIC and System, Fudan University, Shanghai, P.R China","institution_ids":["https://openalex.org/I24943067"]},{"raw_affiliation_string":"State Key Lab. of ASIC & Syst. Fudan Univ., Shanghai, China","institution_ids":["https://openalex.org/I24943067","https://openalex.org/I4391767673"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5063433812","display_name":"Shunli Ma","orcid":"https://orcid.org/0000-0002-2737-9845"},"institutions":[{"id":"https://openalex.org/I4391767673","display_name":"State Key Laboratory of ASIC and System","ror":"https://ror.org/01mamgv83","country_code":null,"type":"facility","lineage":["https://openalex.org/I24943067","https://openalex.org/I4391767673"]},{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Shunli Ma","raw_affiliation_strings":["State Key Laboratory of ASIC and System, Fudan University, Shanghai, P.R China","State Key Lab. of ASIC & Syst. Fudan Univ., Shanghai, China"],"affiliations":[{"raw_affiliation_string":"State Key Laboratory of ASIC and System, Fudan University, Shanghai, P.R China","institution_ids":["https://openalex.org/I24943067"]},{"raw_affiliation_string":"State Key Lab. of ASIC & Syst. Fudan Univ., Shanghai, China","institution_ids":["https://openalex.org/I24943067","https://openalex.org/I4391767673"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5025053306","display_name":"Fan Ye","orcid":"https://orcid.org/0000-0002-1089-1498"},"institutions":[{"id":"https://openalex.org/I4391767673","display_name":"State Key Laboratory of ASIC and System","ror":"https://ror.org/01mamgv83","country_code":null,"type":"facility","lineage":["https://openalex.org/I24943067","https://openalex.org/I4391767673"]},{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Fan Ye","raw_affiliation_strings":["State Key Laboratory of ASIC and System, Fudan University, Shanghai, P.R China","State Key Lab. of ASIC & Syst. Fudan Univ., Shanghai, China"],"affiliations":[{"raw_affiliation_string":"State Key Laboratory of ASIC and System, Fudan University, Shanghai, P.R China","institution_ids":["https://openalex.org/I24943067"]},{"raw_affiliation_string":"State Key Lab. of ASIC & Syst. Fudan Univ., Shanghai, China","institution_ids":["https://openalex.org/I24943067","https://openalex.org/I4391767673"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5016448886","display_name":"Junyan Ren","orcid":"https://orcid.org/0000-0002-7799-6251"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]},{"id":"https://openalex.org/I4391767673","display_name":"State Key Laboratory of ASIC and System","ror":"https://ror.org/01mamgv83","country_code":null,"type":"facility","lineage":["https://openalex.org/I24943067","https://openalex.org/I4391767673"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Junyan Ren","raw_affiliation_strings":["State Key Laboratory of ASIC and System, Fudan University, Shanghai, P.R China","State Key Lab. of ASIC & Syst. Fudan Univ., Shanghai, China"],"affiliations":[{"raw_affiliation_string":"State Key Laboratory of ASIC and System, Fudan University, Shanghai, P.R China","institution_ids":["https://openalex.org/I24943067"]},{"raw_affiliation_string":"State Key Lab. of ASIC & Syst. Fudan Univ., Shanghai, China","institution_ids":["https://openalex.org/I24943067","https://openalex.org/I4391767673"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5103543347"],"corresponding_institution_ids":["https://openalex.org/I24943067","https://openalex.org/I4391767673"],"apc_list":null,"apc_paid":null,"fwci":0.1868,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.56375395,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"2365","last_page":"2368"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.98580002784729,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/comparator","display_name":"Comparator","score":0.9213452339172363},{"id":"https://openalex.org/keywords/successive-approximation-adc","display_name":"Successive approximation ADC","score":0.8746781349182129},{"id":"https://openalex.org/keywords/offset","display_name":"Offset (computer science)","score":0.6333792209625244},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.546693742275238},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4715181589126587},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.46321019530296326},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.4569239616394043},{"id":"https://openalex.org/keywords/calibration","display_name":"Calibration","score":0.4192591905593872},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2746691107749939},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.24672931432724},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.19572678208351135}],"concepts":[{"id":"https://openalex.org/C155745195","wikidata":"https://www.wikidata.org/wiki/Q1164179","display_name":"Comparator","level":3,"score":0.9213452339172363},{"id":"https://openalex.org/C60154766","wikidata":"https://www.wikidata.org/wiki/Q2650458","display_name":"Successive approximation ADC","level":4,"score":0.8746781349182129},{"id":"https://openalex.org/C175291020","wikidata":"https://www.wikidata.org/wiki/Q1156822","display_name":"Offset (computer science)","level":2,"score":0.6333792209625244},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.546693742275238},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4715181589126587},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.46321019530296326},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.4569239616394043},{"id":"https://openalex.org/C165838908","wikidata":"https://www.wikidata.org/wiki/Q736777","display_name":"Calibration","level":2,"score":0.4192591905593872},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2746691107749939},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.24672931432724},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.19572678208351135},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas.2014.6865647","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2014.6865647","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.8999999761581421,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W2020287356","https://openalex.org/W2059033302","https://openalex.org/W2061840656","https://openalex.org/W2108909198","https://openalex.org/W2133748316","https://openalex.org/W2170863405","https://openalex.org/W3141262087","https://openalex.org/W6665514556","https://openalex.org/W6685014176"],"related_works":["https://openalex.org/W2278942241","https://openalex.org/W1977749038","https://openalex.org/W2082979872","https://openalex.org/W2368405386","https://openalex.org/W2792167570","https://openalex.org/W2135250276","https://openalex.org/W2039630794","https://openalex.org/W2136440001","https://openalex.org/W1641489184","https://openalex.org/W2290076986"],"abstract_inverted_index":{"A":[0],"400-MS/s":[1],"8-b":[2],"SAR":[3,16],"ADC":[4,35,101],"with":[5,14,118],"2-b/cycle":[6],"conversion":[7],"is":[8,20,68,85],"presented":[9],"in":[10],"this":[11],"paper.":[12],"Compared":[13],"conventional":[15],"structure,":[17],"an":[18],"AUX-DAC":[19],"proposed":[21,32],"to":[22,55,80,87],"achieve":[23],"high":[24],"switch":[25],"energy":[26],"efficiency":[27],"and":[28,75,111],"low":[29],"power.":[30],"The":[31,94],"structure":[33],"of":[34,91,105,109,113],"uses":[36],"a":[37,103],"shared":[38],"interpolator,":[39],"which":[40],"not":[41],"only":[42],"reduces":[43],"one":[44],"DAC,":[45],"but":[46],"also":[47],"separates":[48],"the":[49,53,57,63,65,71,76,81,89,92,100],"input":[50],"signal":[51],"from":[52],"comparator":[54],"reduce":[56],"kickback":[58],"noise.":[59],"To":[60],"further":[61],"increase":[62],"speed,":[64],"logic":[66],"delay":[67],"reduced":[69],"by":[70],"comparators":[72],"working":[73],"alternatively":[74],"results":[77,97],"directly":[78],"sent":[79],"M-DAC.":[82],"Foreground":[83],"calibration":[84],"used":[86],"calibrate":[88],"offset":[90],"comparators.":[93],"post":[95],"simulation":[96],"show":[98],"that":[99],"achieves":[102],"SNDR":[104],"48dB,":[106],"power":[107],"consumption":[108],"5.6mW":[110],"FoM":[112],"67fF/conversion-step":[114],"at":[115],"400MS/s":[116],"rate":[117],"1.2":[119],"V":[120],"supply":[121],"voltage.":[122]},"counts_by_year":[{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2015,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}