{"id":"https://openalex.org/W2053537416","doi":"https://doi.org/10.1109/iscas.2014.6865524","title":"A low-power Spread Spectrum Clock Generator with an embeddable half-integer division ratio interpolator","display_name":"A low-power Spread Spectrum Clock Generator with an embeddable half-integer division ratio interpolator","publication_year":2014,"publication_date":"2014-06-01","ids":{"openalex":"https://openalex.org/W2053537416","doi":"https://doi.org/10.1109/iscas.2014.6865524","mag":"2053537416"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2014.6865524","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2014.6865524","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5060889952","display_name":"Hsi-En Liu","orcid":null},"institutions":[{"id":"https://openalex.org/I25846049","display_name":"National Tsing Hua University","ror":"https://ror.org/00zdnkx70","country_code":"TW","type":"education","lineage":["https://openalex.org/I25846049"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Hsi-En Liu","raw_affiliation_strings":["National Tsing Hua University, Hsinchu, Taiwan, R.O.C","National Tsing Hua University, , Hsinchu, Taiw\u00e1n"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"National Tsing Hua University, Hsinchu, Taiwan, R.O.C","institution_ids":["https://openalex.org/I25846049"]},{"raw_affiliation_string":"National Tsing Hua University, , Hsinchu, Taiw\u00e1n","institution_ids":["https://openalex.org/I25846049"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5103484907","display_name":"Shih-Che Hung","orcid":null},"institutions":[{"id":"https://openalex.org/I25846049","display_name":"National Tsing Hua University","ror":"https://ror.org/00zdnkx70","country_code":"TW","type":"education","lineage":["https://openalex.org/I25846049"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Shih-Che Hung","raw_affiliation_strings":["National Tsing Hua University, Hsinchu, Taiwan, R.O.C","National Tsing Hua University, , Hsinchu, Taiw\u00e1n"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"National Tsing Hua University, Hsinchu, Taiwan, R.O.C","institution_ids":["https://openalex.org/I25846049"]},{"raw_affiliation_string":"National Tsing Hua University, , Hsinchu, Taiw\u00e1n","institution_ids":["https://openalex.org/I25846049"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5113524198","display_name":"Chih-Wen Lu","orcid":null},"institutions":[{"id":"https://openalex.org/I25846049","display_name":"National Tsing Hua University","ror":"https://ror.org/00zdnkx70","country_code":"TW","type":"education","lineage":["https://openalex.org/I25846049"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Chih-Wen Lu","raw_affiliation_strings":["National Tsing Hua University, Hsinchu, Taiwan, R.O.C","National Tsing Hua University, , Hsinchu, Taiw\u00e1n"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"National Tsing Hua University, Hsinchu, Taiwan, R.O.C","institution_ids":["https://openalex.org/I25846049"]},{"raw_affiliation_string":"National Tsing Hua University, , Hsinchu, Taiw\u00e1n","institution_ids":["https://openalex.org/I25846049"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100885664","display_name":"Tsin\u2010Yuan Chang","orcid":null},"institutions":[{"id":"https://openalex.org/I25846049","display_name":"National Tsing Hua University","ror":"https://ror.org/00zdnkx70","country_code":"TW","type":"education","lineage":["https://openalex.org/I25846049"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Tsin-Yuan Chang","raw_affiliation_strings":["National Tsing Hua University, Hsinchu, Taiwan, R.O.C","National Tsing Hua University, , Hsinchu, Taiw\u00e1n"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"National Tsing Hua University, Hsinchu, Taiwan, R.O.C","institution_ids":["https://openalex.org/I25846049"]},{"raw_affiliation_string":"National Tsing Hua University, , Hsinchu, Taiw\u00e1n","institution_ids":["https://openalex.org/I25846049"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I25846049"],"apc_list":null,"apc_paid":null,"fwci":0.4079,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.53446569,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"1873","last_page":"1876"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.998199999332428,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9980000257492065,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/frequency-divider","display_name":"Frequency divider","score":0.7226797342300415},{"id":"https://openalex.org/keywords/clock-generator","display_name":"Clock generator","score":0.5335626602172852},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.4595870077610016},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4024611711502075},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.3823835253715515},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.33389487862586975},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.3221074938774109},{"id":"https://openalex.org/keywords/clock-signal","display_name":"Clock signal","score":0.26422780752182007},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.2550356984138489}],"concepts":[{"id":"https://openalex.org/C74982907","wikidata":"https://www.wikidata.org/wiki/Q1455624","display_name":"Frequency divider","level":3,"score":0.7226797342300415},{"id":"https://openalex.org/C2778023540","wikidata":"https://www.wikidata.org/wiki/Q2164847","display_name":"Clock generator","level":4,"score":0.5335626602172852},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.4595870077610016},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4024611711502075},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.3823835253715515},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.33389487862586975},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.3221074938774109},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.26422780752182007},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.2550356984138489}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas.2014.6865524","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2014.6865524","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.8999999761581421,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":12,"referenced_works":["https://openalex.org/W1972768432","https://openalex.org/W2039638078","https://openalex.org/W2075310429","https://openalex.org/W2076799001","https://openalex.org/W2111507353","https://openalex.org/W2115002043","https://openalex.org/W2117662511","https://openalex.org/W2128401587","https://openalex.org/W2150186412","https://openalex.org/W2156819697","https://openalex.org/W6643596546","https://openalex.org/W6683115835"],"related_works":["https://openalex.org/W2052757912","https://openalex.org/W2049514612","https://openalex.org/W1967462795","https://openalex.org/W2023485042","https://openalex.org/W2167294056","https://openalex.org/W2109445684","https://openalex.org/W4288067677","https://openalex.org/W1975534335","https://openalex.org/W2159683034","https://openalex.org/W2040549330"],"abstract_inverted_index":{"This":[0,63],"study":[1],"proposes":[2],"a":[3,16,22,31,37,67,73,104],"Spread":[4],"Spectrum":[5],"Clock":[6],"Generator":[7],"(SSCG)":[8],"for":[9],"Serial-ATA":[10],"II,":[11],"which":[12,84],"is":[13,112,119],"realized":[14,50],"by":[15,51],"delta-sigma":[17],"fractional-N":[18],"frequency":[19],"synthesizer":[20],"with":[21,58,103],"digital":[23],"triangular":[24,107],"profile":[25],"generator":[26],"without":[27],"external":[28],"clock":[29,95],"and":[30,40,99,115],"half-integer":[32,46,64],"divider.":[33],"By":[34],"adding":[35],"only":[36],"negative-edge-triggered":[38],"resampler":[39],"using":[41],"phase":[42,75],"combination":[43],"technique,":[44],"the":[45,116],"divider":[47,57,65],"can":[48],"be":[49],"any":[52],"kind":[53],"of":[54,96],"integer":[55],"programmable":[56],"little":[59],"power":[60,117,127],"consumption":[61,118],"added.":[62],"utilizes":[66],"half":[68],"division":[69],"ration":[70],"to":[71,77],"obtain":[72],"small":[74],"jump":[76],"reduce":[78],"quantization":[79],"noise.":[80],"The":[81,109],"SSCG":[82],"prototype,":[83],"has":[85],"been":[86],"produced":[87],"in":[88],"0.18-\u03bcm":[89],"CMOS":[90],"technology,":[91],"achieves":[92],"an":[93],"output":[94],"3":[97],"GHz":[98],"4883ppm":[100],"down":[101],"spread":[102],"30":[105],"KHz":[106],"waveform.":[108],"EMI":[110],"reduction":[111],"13":[113],"dB":[114],"as":[120,122],"low":[121],"12":[123],"mW":[124],"under":[125],"1.8-V":[126],"supply.":[128]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2017,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}