{"id":"https://openalex.org/W1978134924","doi":"https://doi.org/10.1109/iscas.2014.6865452","title":"CheckerBoard binary CNN core","display_name":"CheckerBoard binary CNN core","publication_year":2014,"publication_date":"2014-06-01","ids":{"openalex":"https://openalex.org/W1978134924","doi":"https://doi.org/10.1109/iscas.2014.6865452","mag":"1978134924"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2014.6865452","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2014.6865452","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5038944203","display_name":"A. Paasio","orcid":"https://orcid.org/0000-0003-2543-7391"},"institutions":[{"id":"https://openalex.org/I155660961","display_name":"University of Turku","ror":"https://ror.org/05vghhr25","country_code":"FI","type":"education","lineage":["https://openalex.org/I155660961"]}],"countries":["FI"],"is_corresponding":true,"raw_author_name":"Ari Paasio","raw_affiliation_strings":["Technology Research Center (TRC), University of Turku Turku, Finland","Technol. Res. Center (TRC), Univ. of Turku, Turku, Finland"],"affiliations":[{"raw_affiliation_string":"Technology Research Center (TRC), University of Turku Turku, Finland","institution_ids":["https://openalex.org/I155660961"]},{"raw_affiliation_string":"Technol. Res. Center (TRC), Univ. of Turku, Turku, Finland","institution_ids":["https://openalex.org/I155660961"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5038944203"],"corresponding_institution_ids":["https://openalex.org/I155660961"],"apc_list":null,"apc_paid":null,"fwci":0.2093,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.56551812,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"1584","last_page":"1587"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9986000061035156,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11601","display_name":"Neuroscience and Neural Engineering","score":0.9955000281333923,"subfield":{"id":"https://openalex.org/subfields/2804","display_name":"Cellular and Molecular Neuroscience"},"field":{"id":"https://openalex.org/fields/28","display_name":"Neuroscience"},"domain":{"id":"https://openalex.org/domains/1","display_name":"Life Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8019458055496216},{"id":"https://openalex.org/keywords/binary-number","display_name":"Binary number","score":0.654426634311676},{"id":"https://openalex.org/keywords/layer","display_name":"Layer (electronics)","score":0.5713826417922974},{"id":"https://openalex.org/keywords/pixel","display_name":"Pixel","score":0.5192704200744629},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.5110651254653931},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4812714457511902},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4539399743080139},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.44489988684654236},{"id":"https://openalex.org/keywords/simple","display_name":"Simple (philosophy)","score":0.4388091564178467},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3743237853050232},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.35012903809547424},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.14842009544372559},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.11067140102386475},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.07981657981872559}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8019458055496216},{"id":"https://openalex.org/C48372109","wikidata":"https://www.wikidata.org/wiki/Q3913","display_name":"Binary number","level":2,"score":0.654426634311676},{"id":"https://openalex.org/C2779227376","wikidata":"https://www.wikidata.org/wiki/Q6505497","display_name":"Layer (electronics)","level":2,"score":0.5713826417922974},{"id":"https://openalex.org/C160633673","wikidata":"https://www.wikidata.org/wiki/Q355198","display_name":"Pixel","level":2,"score":0.5192704200744629},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.5110651254653931},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4812714457511902},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4539399743080139},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.44489988684654236},{"id":"https://openalex.org/C2780586882","wikidata":"https://www.wikidata.org/wiki/Q7520643","display_name":"Simple (philosophy)","level":2,"score":0.4388091564178467},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3743237853050232},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.35012903809547424},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.14842009544372559},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.11067140102386475},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.07981657981872559},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C111472728","wikidata":"https://www.wikidata.org/wiki/Q9471","display_name":"Epistemology","level":1,"score":0.0},{"id":"https://openalex.org/C185592680","wikidata":"https://www.wikidata.org/wiki/Q2329","display_name":"Chemistry","level":0,"score":0.0},{"id":"https://openalex.org/C178790620","wikidata":"https://www.wikidata.org/wiki/Q11351","display_name":"Organic chemistry","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas.2014.6865452","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2014.6865452","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","score":0.44999998807907104,"id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":5,"referenced_works":["https://openalex.org/W187407805","https://openalex.org/W1976047311","https://openalex.org/W2104839467","https://openalex.org/W2117347589","https://openalex.org/W2123221271"],"related_works":["https://openalex.org/W2085033728","https://openalex.org/W4285411112","https://openalex.org/W2171299904","https://openalex.org/W1647606319","https://openalex.org/W4390494008","https://openalex.org/W2053596378","https://openalex.org/W2922442631","https://openalex.org/W2168523118","https://openalex.org/W3023876411","https://openalex.org/W123152114"],"abstract_inverted_index":{"The":[0],"3D":[1],"integration":[2,20],"of":[3,21,37,57,62,116],"Cellular":[4],"Nonlinear":[5],"Network":[6],"architectures":[7],"offers":[8],"possibilities":[9],"to":[10,25,33,49,52,54,83,106,109],"increase":[11],"the":[12,30,85,91,100],"pixel":[13],"and":[14,43],"processor":[15,23,63],"count":[16],"remarkably":[17],"by":[18],"allowing":[19],"different":[22,26],"functionalities":[24,111],"chip":[27],"layers.":[28],"On":[29],"other":[31,110],"hand,":[32],"avoid":[34],"extensive":[35],"use":[36],"Through":[38],"Silicon":[39],"Vias":[40],"for":[41,76],"inter":[42],"intracellular":[44],"communication,":[45],"it":[46],"is":[47,81],"important":[48],"be":[50,104,107],"able":[51,82],"fit":[53],"each":[55],"layer":[56],"silicon":[58],"as":[59,65,112],"complete":[60],"parts":[61],"structures":[64],"possible.":[66],"In":[67],"this":[68],"article":[69],"we":[70],"propose":[71],"a":[72],"CheckerBoard":[73],"CNN":[74],"architecture":[75],"binary":[77,119],"image":[78],"processing":[79],"that":[80],"reduce":[84],"required":[86],"hardware":[87],"while":[88],"simultaneously":[89],"preserving":[90],"full":[92],"functionality.":[93],"Although":[94],"rather":[95],"simple":[96],"examples":[97],"are":[98,122],"given,":[99],"design":[101],"ideology":[102],"can":[103],"considered":[105],"extended":[108],"well.":[113],"Simulation":[114],"results":[115],"propagation":[117],"intensive":[118],"template":[120],"Holefiller":[121],"given.":[123]},"counts_by_year":[{"year":2016,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}