{"id":"https://openalex.org/W2072231431","doi":"https://doi.org/10.1109/iscas.2014.6865269","title":"VLSI implementation of a conductance-based multi-synapse using switched-capacitor circuits","display_name":"VLSI implementation of a conductance-based multi-synapse using switched-capacitor circuits","publication_year":2014,"publication_date":"2014-06-01","ids":{"openalex":"https://openalex.org/W2072231431","doi":"https://doi.org/10.1109/iscas.2014.6865269","mag":"2072231431"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2014.6865269","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2014.6865269","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5014397790","display_name":"Marko Noack","orcid":null},"institutions":[{"id":"https://openalex.org/I78650965","display_name":"Technische Universit\u00e4t Dresden","ror":"https://ror.org/042aqky30","country_code":"DE","type":"education","lineage":["https://openalex.org/I78650965"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Marko Noack","raw_affiliation_strings":["Endowed Chair for Highly Parallel VLSI Systems and Neuromorphic Circuits, Technische Universit\u00e4t Dresden, Germany","Inst. of Circuits & Syst., Tech. Univ. Dresden, Dresden, Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Endowed Chair for Highly Parallel VLSI Systems and Neuromorphic Circuits, Technische Universit\u00e4t Dresden, Germany","institution_ids":["https://openalex.org/I78650965"]},{"raw_affiliation_string":"Inst. of Circuits & Syst., Tech. Univ. Dresden, Dresden, Germany","institution_ids":["https://openalex.org/I78650965"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5059002828","display_name":"Markus Krause","orcid":null},"institutions":[{"id":"https://openalex.org/I78650965","display_name":"Technische Universit\u00e4t Dresden","ror":"https://ror.org/042aqky30","country_code":"DE","type":"education","lineage":["https://openalex.org/I78650965"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Markus Krause","raw_affiliation_strings":["Endowed Chair for Highly Parallel VLSI Systems and Neuromorphic Circuits, Technische Universit\u00e4t Dresden, Germany","Inst. of Circuits & Syst., Tech. Univ. Dresden, Dresden, Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Endowed Chair for Highly Parallel VLSI Systems and Neuromorphic Circuits, Technische Universit\u00e4t Dresden, Germany","institution_ids":["https://openalex.org/I78650965"]},{"raw_affiliation_string":"Inst. of Circuits & Syst., Tech. Univ. Dresden, Dresden, Germany","institution_ids":["https://openalex.org/I78650965"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5071241846","display_name":"Christian Mayr","orcid":"https://orcid.org/0000-0003-3502-0872"},"institutions":[{"id":"https://openalex.org/I78650965","display_name":"Technische Universit\u00e4t Dresden","ror":"https://ror.org/042aqky30","country_code":"DE","type":"education","lineage":["https://openalex.org/I78650965"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Christian Mayr","raw_affiliation_strings":["Endowed Chair for Highly Parallel VLSI Systems and Neuromorphic Circuits, Technische Universit\u00e4t Dresden, Germany","Inst. of Circuits & Syst., Tech. Univ. Dresden, Dresden, Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Endowed Chair for Highly Parallel VLSI Systems and Neuromorphic Circuits, Technische Universit\u00e4t Dresden, Germany","institution_ids":["https://openalex.org/I78650965"]},{"raw_affiliation_string":"Inst. of Circuits & Syst., Tech. Univ. Dresden, Dresden, Germany","institution_ids":["https://openalex.org/I78650965"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5003942211","display_name":"Johannes Partzsch","orcid":"https://orcid.org/0000-0002-6286-5064"},"institutions":[{"id":"https://openalex.org/I78650965","display_name":"Technische Universit\u00e4t Dresden","ror":"https://ror.org/042aqky30","country_code":"DE","type":"education","lineage":["https://openalex.org/I78650965"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Johannes Partzsch","raw_affiliation_strings":["Endowed Chair for Highly Parallel VLSI Systems and Neuromorphic Circuits, Technische Universit\u00e4t Dresden, Germany","Inst. of Circuits & Syst., Tech. Univ. Dresden, Dresden, Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Endowed Chair for Highly Parallel VLSI Systems and Neuromorphic Circuits, Technische Universit\u00e4t Dresden, Germany","institution_ids":["https://openalex.org/I78650965"]},{"raw_affiliation_string":"Inst. of Circuits & Syst., Tech. Univ. Dresden, Dresden, Germany","institution_ids":["https://openalex.org/I78650965"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5110046407","display_name":"Ren\u00e9 Sch\u00fcffny","orcid":null},"institutions":[{"id":"https://openalex.org/I78650965","display_name":"Technische Universit\u00e4t Dresden","ror":"https://ror.org/042aqky30","country_code":"DE","type":"education","lineage":["https://openalex.org/I78650965"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Rene Schuffny","raw_affiliation_strings":["Endowed Chair for Highly Parallel VLSI Systems and Neuromorphic Circuits, Technische Universit\u00e4t Dresden, Germany","Inst. of Circuits & Syst., Tech. Univ. Dresden, Dresden, Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Endowed Chair for Highly Parallel VLSI Systems and Neuromorphic Circuits, Technische Universit\u00e4t Dresden, Germany","institution_ids":["https://openalex.org/I78650965"]},{"raw_affiliation_string":"Inst. of Circuits & Syst., Tech. Univ. Dresden, Dresden, Germany","institution_ids":["https://openalex.org/I78650965"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I78650965"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":24,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":null,"last_page":null},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10581","display_name":"Neural dynamics and brain function","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2805","display_name":"Cognitive Neuroscience"},"field":{"id":"https://openalex.org/fields/28","display_name":"Neuroscience"},"domain":{"id":"https://openalex.org/domains/1","display_name":"Life Sciences"}},{"id":"https://openalex.org/T11601","display_name":"Neuroscience and Neural Engineering","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2804","display_name":"Cellular and Molecular Neuroscience"},"field":{"id":"https://openalex.org/fields/28","display_name":"Neuroscience"},"domain":{"id":"https://openalex.org/domains/1","display_name":"Life Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/neuromorphic-engineering","display_name":"Neuromorphic engineering","score":0.7222555875778198},{"id":"https://openalex.org/keywords/synapse","display_name":"Synapse","score":0.7130745053291321},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6068839430809021},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.6017419099807739},{"id":"https://openalex.org/keywords/subthreshold-conduction","display_name":"Subthreshold conduction","score":0.5192394256591797},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.43106910586357117},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3564158082008362},{"id":"https://openalex.org/keywords/neuroscience","display_name":"Neuroscience","score":0.3218470513820648},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.22100207209587097},{"id":"https://openalex.org/keywords/artificial-neural-network","display_name":"Artificial neural network","score":0.18713515996932983},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.17578235268592834},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.14036372303962708},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.1281421184539795},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.1264493763446808},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.10733452439308167}],"concepts":[{"id":"https://openalex.org/C151927369","wikidata":"https://www.wikidata.org/wiki/Q1981312","display_name":"Neuromorphic engineering","level":3,"score":0.7222555875778198},{"id":"https://openalex.org/C127445978","wikidata":"https://www.wikidata.org/wiki/Q187181","display_name":"Synapse","level":2,"score":0.7130745053291321},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6068839430809021},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.6017419099807739},{"id":"https://openalex.org/C156465305","wikidata":"https://www.wikidata.org/wiki/Q1658601","display_name":"Subthreshold conduction","level":4,"score":0.5192394256591797},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.43106910586357117},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3564158082008362},{"id":"https://openalex.org/C169760540","wikidata":"https://www.wikidata.org/wiki/Q207011","display_name":"Neuroscience","level":1,"score":0.3218470513820648},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.22100207209587097},{"id":"https://openalex.org/C50644808","wikidata":"https://www.wikidata.org/wiki/Q192776","display_name":"Artificial neural network","level":2,"score":0.18713515996932983},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.17578235268592834},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.14036372303962708},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.1281421184539795},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.1264493763446808},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.10733452439308167},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1109/iscas.2014.6865269","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2014.6865269","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},{"id":"pmh:doi:10.5167/uzh-107838","is_oa":false,"landing_page_url":null,"pdf_url":null,"source":{"id":"https://openalex.org/S4406922384","display_name":"Open MIND","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"Text"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.721.2258","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.721.2258","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.ini.uzh.ch/admin/extras/doc_get.php?id%3D52435","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":16,"referenced_works":["https://openalex.org/W1480250540","https://openalex.org/W1484078113","https://openalex.org/W1487210357","https://openalex.org/W1490778550","https://openalex.org/W2026421886","https://openalex.org/W2092618119","https://openalex.org/W2101586548","https://openalex.org/W2110814829","https://openalex.org/W2121917196","https://openalex.org/W2160767469","https://openalex.org/W2170657812","https://openalex.org/W2314109860","https://openalex.org/W6628712854","https://openalex.org/W6629029795","https://openalex.org/W6673463086","https://openalex.org/W6676629286"],"related_works":["https://openalex.org/W2986579802","https://openalex.org/W3108691306","https://openalex.org/W4389237622","https://openalex.org/W2166309310","https://openalex.org/W4385753159","https://openalex.org/W4200152843","https://openalex.org/W4387251107","https://openalex.org/W4214914769","https://openalex.org/W4283271085","https://openalex.org/W3033201189"],"abstract_inverted_index":{"For":[0],"neuromorphic":[1],"ICs,":[2],"the":[3,12,19],"implemented":[4],"synaptic":[5],"dynamics":[6,28],"play":[7],"an":[8],"important":[9],"role":[10],"in":[11,33,42,60],"complexity":[13],"achievable":[14],"when":[15],"running":[16],"networks":[17],"on":[18],"overall":[20],"IC.":[21],"One":[22],"of":[23,82],"these":[24],"ingredients":[25],"for":[26],"realistic":[27],"are":[29,57],"conductance-based":[30,84],"synapses,":[31],"which":[32],"contrast":[34],"to":[35,45,67,69,91,107,130],"current-based":[36],"synapses":[37],"let":[38],"a":[39,77,83,132],"neuron":[40,133],"adapt":[41],"various":[43],"ways":[44],"its":[46,112],"input":[47],"characteristics.":[48],"Another":[49],"ingredient":[50],"is":[51,104],"classical":[52],"neuronal":[53],"spike-frequency":[54,135],"adaptation.":[55],"Both":[56],"usually":[58],"realized":[59],"fully-analog":[61],"subthreshold":[62],"circuits,":[63],"making":[64],"them":[65],"hard":[66],"port":[68,108],"modern":[70],"sub-100nm":[71],"technologies.":[72],"In":[73],"contrast,":[74],"we":[75],"present":[76],"compact":[78],"switched-capacitor":[79],"(SC)":[80],"model":[81],"synapse":[85,124],"that":[86],"can":[87,126],"be":[88,128],"widely":[89],"configured":[90],"accurately":[92],"depict":[93],"e.g.":[94],"NMDA,":[95],"GABA":[96],"or":[97],"AMPA":[98],"type":[99],"synapses.":[100],"The":[101],"SC":[102],"approach":[103],"inherently":[105],"easy":[106],"between":[109],"technologies":[110],"and":[111],"digital":[113],"part":[114],"benefits":[115],"fully":[116],"from":[117],"technology":[118],"scaling.":[119],"We":[120],"show":[121],"how":[122],"this":[123],"circuit":[125],"also":[127],"utilized":[129],"endow":[131],"with":[134],"adaptation":[136],"(SFA).":[137]},"counts_by_year":[{"year":2024,"cited_by_count":2},{"year":2023,"cited_by_count":2},{"year":2022,"cited_by_count":2},{"year":2021,"cited_by_count":3},{"year":2020,"cited_by_count":2},{"year":2019,"cited_by_count":4},{"year":2018,"cited_by_count":3},{"year":2017,"cited_by_count":3},{"year":2015,"cited_by_count":2},{"year":2014,"cited_by_count":1}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}
