{"id":"https://openalex.org/W2024778539","doi":"https://doi.org/10.1109/iscas.2013.6572190","title":"A meminductive circuit based on floating memristive emulator","display_name":"A meminductive circuit based on floating memristive emulator","publication_year":2013,"publication_date":"2013-05-01","ids":{"openalex":"https://openalex.org/W2024778539","doi":"https://doi.org/10.1109/iscas.2013.6572190","mag":"2024778539"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2013.6572190","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2013.6572190","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 IEEE International Symposium on Circuits and Systems (ISCAS2013)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5061654203","display_name":"Dongsheng Yu","orcid":"https://orcid.org/0000-0002-2269-3659"},"institutions":[{"id":"https://openalex.org/I25757504","display_name":"China University of Mining and Technology","ror":"https://ror.org/01xt2dr21","country_code":"CN","type":"education","lineage":["https://openalex.org/I25757504"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"D. S. Yu","raw_affiliation_strings":["School of Information and Electrical Engineering, China University of Mining and Technology, Xuzhou, China","Sch. of Inf. & Electr. Eng., China Univ. of Min. & Technol., Xuzhou, China"],"affiliations":[{"raw_affiliation_string":"School of Information and Electrical Engineering, China University of Mining and Technology, Xuzhou, China","institution_ids":["https://openalex.org/I25757504"]},{"raw_affiliation_string":"Sch. of Inf. & Electr. Eng., China Univ. of Min. & Technol., Xuzhou, China","institution_ids":["https://openalex.org/I25757504"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5062060179","display_name":"H. Chen","orcid":null},"institutions":[{"id":"https://openalex.org/I25757504","display_name":"China University of Mining and Technology","ror":"https://ror.org/01xt2dr21","country_code":"CN","type":"education","lineage":["https://openalex.org/I25757504"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"H. Chen","raw_affiliation_strings":["School of Information and Electrical Engineering, China University of Mining and Technology, Xuzhou, China","Sch. of Inf. & Electr. Eng., China Univ. of Min. & Technol., Xuzhou, China"],"affiliations":[{"raw_affiliation_string":"School of Information and Electrical Engineering, China University of Mining and Technology, Xuzhou, China","institution_ids":["https://openalex.org/I25757504"]},{"raw_affiliation_string":"Sch. of Inf. & Electr. Eng., China Univ. of Min. & Technol., Xuzhou, China","institution_ids":["https://openalex.org/I25757504"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5017703480","display_name":"Herbert Ho\u2010Ching Iu","orcid":"https://orcid.org/0000-0002-0687-4038"},"institutions":[{"id":"https://openalex.org/I177877127","display_name":"University of Western Australia","ror":"https://ror.org/047272k79","country_code":"AU","type":"education","lineage":["https://openalex.org/I177877127"]}],"countries":["AU"],"is_corresponding":false,"raw_author_name":"H. H. C. Iu","raw_affiliation_strings":["School of Electrical, Electronic and Computer Engineering, University of Western Australia, Crawley, WA, Australia","Sch. of Electr., Electron., & Comput. Eng., Univ. of Western Australia, Crawley, WA, Australia"],"affiliations":[{"raw_affiliation_string":"School of Electrical, Electronic and Computer Engineering, University of Western Australia, Crawley, WA, Australia","institution_ids":["https://openalex.org/I177877127"]},{"raw_affiliation_string":"Sch. of Electr., Electron., & Comput. Eng., Univ. of Western Australia, Crawley, WA, Australia","institution_ids":["https://openalex.org/I177877127"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5061654203"],"corresponding_institution_ids":["https://openalex.org/I25757504"],"apc_list":null,"apc_paid":null,"fwci":1.9219,"has_fulltext":false,"cited_by_count":18,"citation_normalized_percentile":{"value":0.87101212,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"1692","last_page":"1695"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10581","display_name":"Neural dynamics and brain function","score":0.9986000061035156,"subfield":{"id":"https://openalex.org/subfields/2805","display_name":"Cognitive Neuroscience"},"field":{"id":"https://openalex.org/fields/28","display_name":"Neuroscience"},"domain":{"id":"https://openalex.org/domains/1","display_name":"Life Sciences"}},{"id":"https://openalex.org/T11601","display_name":"Neuroscience and Neural Engineering","score":0.996999979019165,"subfield":{"id":"https://openalex.org/subfields/2804","display_name":"Cellular and Molecular Neuroscience"},"field":{"id":"https://openalex.org/fields/28","display_name":"Neuroscience"},"domain":{"id":"https://openalex.org/domains/1","display_name":"Life Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/memristor","display_name":"Memristor","score":0.9111281633377075},{"id":"https://openalex.org/keywords/correctness","display_name":"Correctness","score":0.6880323886871338},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6589277982711792},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5691914558410645},{"id":"https://openalex.org/keywords/mixed-signal-integrated-circuit","display_name":"Mixed-signal integrated circuit","score":0.47387930750846863},{"id":"https://openalex.org/keywords/circuit-design","display_name":"Circuit design","score":0.4645151197910309},{"id":"https://openalex.org/keywords/waveform","display_name":"Waveform","score":0.46119120717048645},{"id":"https://openalex.org/keywords/property","display_name":"Property (philosophy)","score":0.4193551242351532},{"id":"https://openalex.org/keywords/circuit-extraction","display_name":"Circuit extraction","score":0.4173535704612732},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3472839295864105},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.30749815702438354},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2999590039253235},{"id":"https://openalex.org/keywords/equivalent-circuit","display_name":"Equivalent circuit","score":0.29749608039855957},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.2957284450531006},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.22112542390823364},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.20250341296195984},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.06597092747688293}],"concepts":[{"id":"https://openalex.org/C150072547","wikidata":"https://www.wikidata.org/wiki/Q212923","display_name":"Memristor","level":2,"score":0.9111281633377075},{"id":"https://openalex.org/C55439883","wikidata":"https://www.wikidata.org/wiki/Q360812","display_name":"Correctness","level":2,"score":0.6880323886871338},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6589277982711792},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5691914558410645},{"id":"https://openalex.org/C62907940","wikidata":"https://www.wikidata.org/wiki/Q1541329","display_name":"Mixed-signal integrated circuit","level":3,"score":0.47387930750846863},{"id":"https://openalex.org/C190560348","wikidata":"https://www.wikidata.org/wiki/Q3245116","display_name":"Circuit design","level":2,"score":0.4645151197910309},{"id":"https://openalex.org/C197424946","wikidata":"https://www.wikidata.org/wiki/Q1165717","display_name":"Waveform","level":3,"score":0.46119120717048645},{"id":"https://openalex.org/C189950617","wikidata":"https://www.wikidata.org/wiki/Q937228","display_name":"Property (philosophy)","level":2,"score":0.4193551242351532},{"id":"https://openalex.org/C26490066","wikidata":"https://www.wikidata.org/wiki/Q17006835","display_name":"Circuit extraction","level":4,"score":0.4173535704612732},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3472839295864105},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.30749815702438354},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2999590039253235},{"id":"https://openalex.org/C23572009","wikidata":"https://www.wikidata.org/wiki/Q964981","display_name":"Equivalent circuit","level":3,"score":0.29749608039855957},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.2957284450531006},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.22112542390823364},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.20250341296195984},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.06597092747688293},{"id":"https://openalex.org/C111472728","wikidata":"https://www.wikidata.org/wiki/Q9471","display_name":"Epistemology","level":1,"score":0.0},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/iscas.2013.6572190","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2013.6572190","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 IEEE International Symposium on Circuits and Systems (ISCAS2013)","raw_type":"proceedings-article"},{"id":"pmh:oai:pure.atira.dk:publications/5859962a-6355-4e3d-85b5-d28454100820","is_oa":false,"landing_page_url":"https://research-repository.uwa.edu.au/en/publications/5859962a-6355-4e3d-85b5-d28454100820","pdf_url":null,"source":{"id":"https://openalex.org/S4306402523","display_name":"UWA Profiles and Research Repository (University of Western Australia)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I177877127","host_organization_name":"The University of Western Australia","host_organization_lineage":["https://openalex.org/I177877127"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Yu , D S , Chen , H &amp; Iu , H 2013 , A meminductive circuit based on floating memristive emulator . in Circuits and Systems (ISCAS), 2013 IEEE International Symposium . vol. NA , IEEE, Institute of Electrical and Electronics Engineers , USA , pp. 1692-1695 , 2013 IEEE International Symposium on Circuits and Systems (ISCAS) , Beijing , China , 19/05/13 . https://doi.org/10.1109/ISCAS.2013.6572190","raw_type":"contributionToPeriodical"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":14,"referenced_works":["https://openalex.org/W102316227","https://openalex.org/W2018258488","https://openalex.org/W2018645548","https://openalex.org/W2045009304","https://openalex.org/W2063357061","https://openalex.org/W2068459887","https://openalex.org/W2099498910","https://openalex.org/W2102075759","https://openalex.org/W2112181056","https://openalex.org/W2141071915","https://openalex.org/W2143429740","https://openalex.org/W2159731583","https://openalex.org/W2166432809","https://openalex.org/W6604136682"],"related_works":["https://openalex.org/W2390607226","https://openalex.org/W2393658466","https://openalex.org/W2031235560","https://openalex.org/W2383563100","https://openalex.org/W2375888161","https://openalex.org/W4283270193","https://openalex.org/W2355158303","https://openalex.org/W2368652795","https://openalex.org/W2744948163","https://openalex.org/W2081795747"],"abstract_inverted_index":{"The":[0],"main":[1],"purpose":[2],"of":[3,17,69],"this":[4,36,70],"paper":[5],"is":[6,27,40,54],"to":[7,29,43,65],"design":[8,44,51],"a":[9,18,31,45],"circuit":[10,26],"possessing":[11],"meminductive":[12,46,75],"property":[13],"by":[14],"making":[15],"use":[16],"new":[19,71],"floating":[20],"memristive":[21,38],"emulator.":[22],"A":[23],"concise":[24],"analog":[25,37],"proposed":[28],"simulate":[30],"flux":[32],"controlled":[33],"memristor":[34,72],"and":[35,57,74],"emulator":[39,73],"then":[41],"used":[42],"circuit.":[47,76],"To":[48],"confirm":[49],"the":[50,59,67],"effectiveness,":[52],"PSpice":[53],"hence":[55],"introduced":[56],"all":[58],"simulated":[60],"waveforms":[61],"provide":[62],"conclusive":[63],"evidences":[64],"validate":[66],"correctness":[68]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":2},{"year":2021,"cited_by_count":3},{"year":2018,"cited_by_count":2},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":1},{"year":2015,"cited_by_count":3},{"year":2014,"cited_by_count":4}],"updated_date":"2026-04-04T16:13:02.066488","created_date":"2025-10-10T00:00:00"}
