{"id":"https://openalex.org/W1966909872","doi":"https://doi.org/10.1109/iscas.2013.6572117","title":"A self-calibrating multi-VCO PLL scheme with leakage and capacitive modulation mitigations","display_name":"A self-calibrating multi-VCO PLL scheme with leakage and capacitive modulation mitigations","publication_year":2013,"publication_date":"2013-05-01","ids":{"openalex":"https://openalex.org/W1966909872","doi":"https://doi.org/10.1109/iscas.2013.6572117","mag":"1966909872"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2013.6572117","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2013.6572117","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 IEEE International Symposium on Circuits and Systems (ISCAS2013)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100510355","display_name":"Yikui Jen Dong","orcid":null},"institutions":[{"id":"https://openalex.org/I4210119403","display_name":"LSI Solutions (United States)","ror":"https://ror.org/02st8gf30","country_code":"US","type":"company","lineage":["https://openalex.org/I4210119403"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Yikui Jen Dong","raw_affiliation_strings":["LSI Corporation, Milpitas, CA, USA","LSI Corp., Milpitas, CA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"LSI Corporation, Milpitas, CA, USA","institution_ids":[]},{"raw_affiliation_string":"LSI Corp., Milpitas, CA, USA","institution_ids":["https://openalex.org/I4210119403"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5109131881","display_name":"Freeman Zhong","orcid":null},"institutions":[{"id":"https://openalex.org/I4210119403","display_name":"LSI Solutions (United States)","ror":"https://ror.org/02st8gf30","country_code":"US","type":"company","lineage":["https://openalex.org/I4210119403"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Freeman Zhong","raw_affiliation_strings":["LSI Corporation, Milpitas, CA, USA","LSI Corp., Milpitas, CA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"LSI Corporation, Milpitas, CA, USA","institution_ids":[]},{"raw_affiliation_string":"LSI Corp., Milpitas, CA, USA","institution_ids":["https://openalex.org/I4210119403"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I4210119403"],"apc_list":null,"apc_paid":null,"fwci":0.8106,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.63412065,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"1400","last_page":"1403"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10299","display_name":"Photonic and Optical Devices","score":0.9975000023841858,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.8813289403915405},{"id":"https://openalex.org/keywords/voltage-controlled-oscillator","display_name":"Voltage-controlled oscillator","score":0.8381468057632446},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.7064228653907776},{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.7007420063018799},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5842510461807251},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5543854236602783},{"id":"https://openalex.org/keywords/capacitive-sensing","display_name":"Capacitive sensing","score":0.49847936630249023},{"id":"https://openalex.org/keywords/leakage","display_name":"Leakage (economics)","score":0.4608911871910095},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3091854453086853},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2626916170120239},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.10568693280220032}],"concepts":[{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.8813289403915405},{"id":"https://openalex.org/C5291336","wikidata":"https://www.wikidata.org/wiki/Q852341","display_name":"Voltage-controlled oscillator","level":3,"score":0.8381468057632446},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.7064228653907776},{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.7007420063018799},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5842510461807251},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5543854236602783},{"id":"https://openalex.org/C206755178","wikidata":"https://www.wikidata.org/wiki/Q1131271","display_name":"Capacitive sensing","level":2,"score":0.49847936630249023},{"id":"https://openalex.org/C2777042071","wikidata":"https://www.wikidata.org/wiki/Q6509304","display_name":"Leakage (economics)","level":2,"score":0.4608911871910095},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3091854453086853},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2626916170120239},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.10568693280220032},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas.2013.6572117","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2013.6572117","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 IEEE International Symposium on Circuits and Systems (ISCAS2013)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":7,"referenced_works":["https://openalex.org/W2046678941","https://openalex.org/W2061100613","https://openalex.org/W2112857179","https://openalex.org/W2132708203","https://openalex.org/W2147521609","https://openalex.org/W4255401592","https://openalex.org/W6836496719"],"related_works":["https://openalex.org/W2070109416","https://openalex.org/W1523213765","https://openalex.org/W2040399070","https://openalex.org/W2388316590","https://openalex.org/W2976219355","https://openalex.org/W2139484866","https://openalex.org/W2089131288","https://openalex.org/W1600405202","https://openalex.org/W1486070987","https://openalex.org/W3064661991"],"abstract_inverted_index":{"We":[0],"investigate":[1],"the":[2,33,80,94,96,100],"prospect":[3],"of":[4,19],"low-jitter":[5],"wide":[6],"frequency":[7,45],"range":[8,53],"high-speed":[9],"clocking":[10],"implementation.":[11],"A":[12,60],"novel":[13,61],"architecture":[14],"features":[15],"multi-LCVCO":[16],"with":[17,50,73],"mitigation":[18],"dormant":[20],"VCO":[21,72],"leakage":[22],"current":[23],"and":[24,40,99,109],"capacitive":[25],"modulation":[26],"is":[27,65],"proposed.":[28],"The":[29,104],"new":[30],"scheme":[31,106],"decouples":[32],"typical":[34],"trade-offs":[35],"between":[36],"tuning-range,":[37],"achievable":[38],"speed":[39],"jitter-performances.":[41],"It":[42],"enables":[43],"high":[44],"low":[46],"jitter":[47],"PLL":[48,81],"design":[49,88],"sizable":[51],"tuning":[52],"in":[54,82,111],"nowadays":[55],"highly":[56],"leaky":[57],"standard":[58],"CMOS.":[59],"self":[62],"calibration":[63],"method":[64],"presented":[66],"to":[67,78],"seamlessly":[68],"activate":[69],"a":[70,74],"proper":[71,75],"switched-tuning":[76],"band":[77],"bias":[79],"its":[83],"optimal":[84],"operating":[85],"point.":[86],"Hence,":[87],"requirements":[89],"for":[90],"critical":[91],"circuits":[92],"including":[93],"VCO,":[95],"first":[97],"divide-by-2":[98],"loop-filter":[101],"are":[102],"relaxed.":[103],"proposed":[105],"was":[107],"implemented":[108],"validated":[110],"silicon.":[112]},"counts_by_year":[{"year":2016,"cited_by_count":1},{"year":2015,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}