{"id":"https://openalex.org/W2141008485","doi":"https://doi.org/10.1109/iscas.2013.6572078","title":"Designing scratchpad memory architecture with emerging STT-RAM memory technologies","display_name":"Designing scratchpad memory architecture with emerging STT-RAM memory technologies","publication_year":2013,"publication_date":"2013-05-01","ids":{"openalex":"https://openalex.org/W2141008485","doi":"https://doi.org/10.1109/iscas.2013.6572078","mag":"2141008485"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2013.6572078","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2013.6572078","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 IEEE International Symposium on Circuits and Systems (ISCAS2013)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5112387311","display_name":"Peng Wang","orcid":null},"institutions":[{"id":"https://openalex.org/I20231570","display_name":"Peking University","ror":"https://ror.org/02v51f717","country_code":"CN","type":"education","lineage":["https://openalex.org/I20231570"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Peng Wang","raw_affiliation_strings":["Center for Energy-Efficient Computing and Applications, School of EECS, Peking University, Beijing, China","Center for Energy-efficient Comput. & Applic., Peking Univ., Beijing, China"],"affiliations":[{"raw_affiliation_string":"Center for Energy-Efficient Computing and Applications, School of EECS, Peking University, Beijing, China","institution_ids":["https://openalex.org/I20231570"]},{"raw_affiliation_string":"Center for Energy-efficient Comput. & Applic., Peking Univ., Beijing, China","institution_ids":["https://openalex.org/I20231570"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101850376","display_name":"Guangyu Sun","orcid":"https://orcid.org/0000-0001-6436-0820"},"institutions":[{"id":"https://openalex.org/I20231570","display_name":"Peking University","ror":"https://ror.org/02v51f717","country_code":"CN","type":"education","lineage":["https://openalex.org/I20231570"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Guangyu Sun","raw_affiliation_strings":["Center for Energy-Efficient Computing and Applications, School of EECS, Peking University, Beijing, China","Center for Energy-efficient Comput. & Applic., Peking Univ., Beijing, China"],"affiliations":[{"raw_affiliation_string":"Center for Energy-Efficient Computing and Applications, School of EECS, Peking University, Beijing, China","institution_ids":["https://openalex.org/I20231570"]},{"raw_affiliation_string":"Center for Energy-efficient Comput. & Applic., Peking Univ., Beijing, China","institution_ids":["https://openalex.org/I20231570"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5115596282","display_name":"Tao Wang","orcid":"https://orcid.org/0000-0003-3322-7554"},"institutions":[{"id":"https://openalex.org/I20231570","display_name":"Peking University","ror":"https://ror.org/02v51f717","country_code":"CN","type":"education","lineage":["https://openalex.org/I20231570"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Tao Wang","raw_affiliation_strings":["Center for Energy-Efficient Computing and Applications, School of EECS, Peking University, Beijing, China","Center for Energy-efficient Comput. & Applic., Peking Univ., Beijing, China"],"affiliations":[{"raw_affiliation_string":"Center for Energy-Efficient Computing and Applications, School of EECS, Peking University, Beijing, China","institution_ids":["https://openalex.org/I20231570"]},{"raw_affiliation_string":"Center for Energy-efficient Comput. & Applic., Peking Univ., Beijing, China","institution_ids":["https://openalex.org/I20231570"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100385336","display_name":"Yuan Xie","orcid":"https://orcid.org/0000-0003-2093-1788"},"institutions":[{"id":"https://openalex.org/I130769515","display_name":"Pennsylvania State University","ror":"https://ror.org/04p491231","country_code":"US","type":"education","lineage":["https://openalex.org/I130769515"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Yuan Xie","raw_affiliation_strings":["Computer Science and Engineering Department, Pennsylvania State University, PA, USA","Comput. Sci. & Eng. Dept, Pennsylvania State Univ., University Park, PA, USA"],"affiliations":[{"raw_affiliation_string":"Computer Science and Engineering Department, Pennsylvania State University, PA, USA","institution_ids":["https://openalex.org/I130769515"]},{"raw_affiliation_string":"Comput. Sci. & Eng. Dept, Pennsylvania State Univ., University Park, PA, USA","institution_ids":["https://openalex.org/I130769515"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5016776689","display_name":"Jason Cong","orcid":"https://orcid.org/0000-0003-2887-6963"},"institutions":[{"id":"https://openalex.org/I20231570","display_name":"Peking University","ror":"https://ror.org/02v51f717","country_code":"CN","type":"education","lineage":["https://openalex.org/I20231570"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Jason Cong","raw_affiliation_strings":["Peking University, Beijing, Beijing, CN","Center for Energy-efficient Comput. & Applic., Peking Univ., Beijing, China"],"affiliations":[{"raw_affiliation_string":"Peking University, Beijing, Beijing, CN","institution_ids":["https://openalex.org/I20231570"]},{"raw_affiliation_string":"Center for Energy-efficient Comput. & Applic., Peking Univ., Beijing, China","institution_ids":["https://openalex.org/I20231570"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5112387311"],"corresponding_institution_ids":["https://openalex.org/I20231570"],"apc_list":null,"apc_paid":null,"fwci":3.4673,"has_fulltext":false,"cited_by_count":23,"citation_normalized_percentile":{"value":0.92830997,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"1244","last_page":"1247"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.7999551296234131},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7482723593711853},{"id":"https://openalex.org/keywords/non-volatile-memory","display_name":"Non-volatile memory","score":0.6894818544387817},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5674003958702087},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.5547785758972168},{"id":"https://openalex.org/keywords/racetrack-memory","display_name":"Racetrack memory","score":0.534919798374176},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4967647194862366},{"id":"https://openalex.org/keywords/memory-architecture","display_name":"Memory architecture","score":0.4939125180244446},{"id":"https://openalex.org/keywords/non-volatile-random-access-memory","display_name":"Non-volatile random-access memory","score":0.468948096036911},{"id":"https://openalex.org/keywords/memory-refresh","display_name":"Memory refresh","score":0.4670115113258362},{"id":"https://openalex.org/keywords/random-access-memory","display_name":"Random access memory","score":0.44982072710990906},{"id":"https://openalex.org/keywords/memory-management","display_name":"Memory management","score":0.43715745210647583},{"id":"https://openalex.org/keywords/universal-memory","display_name":"Universal memory","score":0.42946934700012207},{"id":"https://openalex.org/keywords/interleaved-memory","display_name":"Interleaved memory","score":0.42552223801612854},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.34266650676727295},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.31986725330352783},{"id":"https://openalex.org/keywords/computer-memory","display_name":"Computer memory","score":0.28657346963882446}],"concepts":[{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.7999551296234131},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7482723593711853},{"id":"https://openalex.org/C177950962","wikidata":"https://www.wikidata.org/wiki/Q10997658","display_name":"Non-volatile memory","level":2,"score":0.6894818544387817},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5674003958702087},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.5547785758972168},{"id":"https://openalex.org/C43363307","wikidata":"https://www.wikidata.org/wiki/Q1651623","display_name":"Racetrack memory","level":5,"score":0.534919798374176},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4967647194862366},{"id":"https://openalex.org/C2779602883","wikidata":"https://www.wikidata.org/wiki/Q15544750","display_name":"Memory architecture","level":2,"score":0.4939125180244446},{"id":"https://openalex.org/C34172316","wikidata":"https://www.wikidata.org/wiki/Q499024","display_name":"Non-volatile random-access memory","level":5,"score":0.468948096036911},{"id":"https://openalex.org/C87907426","wikidata":"https://www.wikidata.org/wiki/Q6815755","display_name":"Memory refresh","level":4,"score":0.4670115113258362},{"id":"https://openalex.org/C2994168587","wikidata":"https://www.wikidata.org/wiki/Q5295","display_name":"Random access memory","level":2,"score":0.44982072710990906},{"id":"https://openalex.org/C176649486","wikidata":"https://www.wikidata.org/wiki/Q2308807","display_name":"Memory management","level":3,"score":0.43715745210647583},{"id":"https://openalex.org/C195053848","wikidata":"https://www.wikidata.org/wiki/Q7894141","display_name":"Universal memory","level":5,"score":0.42946934700012207},{"id":"https://openalex.org/C63511323","wikidata":"https://www.wikidata.org/wiki/Q908936","display_name":"Interleaved memory","level":4,"score":0.42552223801612854},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.34266650676727295},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.31986725330352783},{"id":"https://openalex.org/C92855701","wikidata":"https://www.wikidata.org/wiki/Q5830907","display_name":"Computer memory","level":3,"score":0.28657346963882446}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/iscas.2013.6572078","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2013.6572078","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 IEEE International Symposium on Circuits and Systems (ISCAS2013)","raw_type":"proceedings-article"},{"id":"pmh:oai:repository.hkust.edu.hk:1783.1-153317","is_oa":false,"landing_page_url":"http://repository.hkust.edu.hk/ir/Record/1783.1-153317","pdf_url":null,"source":{"id":"https://openalex.org/S4306401796","display_name":"Rare & Special e-Zone (The Hong Kong University of Science and Technology)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I200769079","host_organization_name":"Hong Kong University of Science and Technology","host_organization_lineage":["https://openalex.org/I200769079"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"Conference paper"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8899999856948853,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":24,"referenced_works":["https://openalex.org/W1686420892","https://openalex.org/W1977857710","https://openalex.org/W1988646820","https://openalex.org/W2002022853","https://openalex.org/W2049306031","https://openalex.org/W2064977311","https://openalex.org/W2069368591","https://openalex.org/W2084007230","https://openalex.org/W2096800126","https://openalex.org/W2098511965","https://openalex.org/W2102449048","https://openalex.org/W2120635877","https://openalex.org/W2149590159","https://openalex.org/W2154553951","https://openalex.org/W2160545443","https://openalex.org/W2163270257","https://openalex.org/W2164264749","https://openalex.org/W3143577886","https://openalex.org/W4238826965","https://openalex.org/W4241166746","https://openalex.org/W4250392169","https://openalex.org/W6637151178","https://openalex.org/W6671695895","https://openalex.org/W6682854596"],"related_works":["https://openalex.org/W4232117715","https://openalex.org/W2358372886","https://openalex.org/W2171888576","https://openalex.org/W1030357071","https://openalex.org/W1494152240","https://openalex.org/W2990977884","https://openalex.org/W2903040985","https://openalex.org/W2063779099","https://openalex.org/W2546565930","https://openalex.org/W4390696710"],"abstract_inverted_index":{"Scratchpad":[0],"memories":[1],"(SPMs)":[2],"have":[3],"been":[4],"widely":[5],"used":[6],"in":[7,74],"embedded":[8,76],"systems":[9],"to":[10,20,69],"achieve":[11],"comparable":[12],"performance":[13],"with":[14,61],"better":[15],"energy":[16],"efficiency":[17],"when":[18],"compared":[19],"caches.":[21],"Spin-transfer":[22],"torque":[23],"RAM":[24],"(STT-RAM)":[25],"is":[26,65],"an":[27,66],"emerging":[28],"nonvolatile":[29],"memory":[30,51,73],"technology":[31],"that":[32,60],"has":[33],"low-power":[34,75],"and":[35,45],"high-density":[36],"advantages":[37],"over":[38],"SRAM.":[39],"In":[40],"this":[41],"study":[42],"we":[43],"explore":[44],"evaluate":[46],"a":[47],"series":[48],"of":[49,54],"scratchpad":[50,72],"architectures":[52],"consisting":[53],"STT-RAM.":[55],"The":[56],"experimental":[57],"results":[58],"reveal":[59],"optimized":[62],"design,":[63],"STT-RAM":[64],"effective":[67],"alternative":[68],"SRAM":[70],"for":[71],"systems.":[77]},"counts_by_year":[{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":3},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":3},{"year":2017,"cited_by_count":4},{"year":2016,"cited_by_count":1},{"year":2015,"cited_by_count":6},{"year":2014,"cited_by_count":3},{"year":2013,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}