{"id":"https://openalex.org/W2094379510","doi":"https://doi.org/10.1109/iscas.2013.6571952","title":"Low power, high linearity multi-mode downconversion mixer for SDR","display_name":"Low power, high linearity multi-mode downconversion mixer for SDR","publication_year":2013,"publication_date":"2013-05-01","ids":{"openalex":"https://openalex.org/W2094379510","doi":"https://doi.org/10.1109/iscas.2013.6571952","mag":"2094379510"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2013.6571952","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2013.6571952","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 IEEE International Symposium on Circuits and Systems (ISCAS2013)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5103131026","display_name":"Yexin Chen","orcid":"https://orcid.org/0000-0002-7638-6662"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]},{"id":"https://openalex.org/I4391767673","display_name":"State Key Laboratory of ASIC and System","ror":"https://ror.org/01mamgv83","country_code":null,"type":"facility","lineage":["https://openalex.org/I24943067","https://openalex.org/I4391767673"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Yexin Chen","raw_affiliation_strings":["State Key Laboratory of ASIC and Systems, Fudan University, Shanghai, China","State Key Lab. of ASIC & Syst. Fudan Univ., Shanghai, China"],"affiliations":[{"raw_affiliation_string":"State Key Laboratory of ASIC and Systems, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]},{"raw_affiliation_string":"State Key Lab. of ASIC & Syst. Fudan Univ., Shanghai, China","institution_ids":["https://openalex.org/I24943067","https://openalex.org/I4391767673"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5052213394","display_name":"Na Yan","orcid":"https://orcid.org/0000-0002-1616-0450"},"institutions":[{"id":"https://openalex.org/I4391767673","display_name":"State Key Laboratory of ASIC and System","ror":"https://ror.org/01mamgv83","country_code":null,"type":"facility","lineage":["https://openalex.org/I24943067","https://openalex.org/I4391767673"]},{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Na Yan","raw_affiliation_strings":["State Key Laboratory of ASIC and Systems, Fudan University, Shanghai, China","State Key Lab. of ASIC & Syst. Fudan Univ., Shanghai, China"],"affiliations":[{"raw_affiliation_string":"State Key Laboratory of ASIC and Systems, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]},{"raw_affiliation_string":"State Key Lab. of ASIC & Syst. Fudan Univ., Shanghai, China","institution_ids":["https://openalex.org/I24943067","https://openalex.org/I4391767673"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101649028","display_name":"Jianfei Xu","orcid":"https://orcid.org/0000-0002-7890-3264"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]},{"id":"https://openalex.org/I4391767673","display_name":"State Key Laboratory of ASIC and System","ror":"https://ror.org/01mamgv83","country_code":null,"type":"facility","lineage":["https://openalex.org/I24943067","https://openalex.org/I4391767673"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Jianfei Xu","raw_affiliation_strings":["State Key Laboratory of ASIC and Systems, Fudan University, Shanghai, China","State Key Lab. of ASIC & Syst. Fudan Univ., Shanghai, China"],"affiliations":[{"raw_affiliation_string":"State Key Laboratory of ASIC and Systems, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]},{"raw_affiliation_string":"State Key Lab. of ASIC & Syst. Fudan Univ., Shanghai, China","institution_ids":["https://openalex.org/I24943067","https://openalex.org/I4391767673"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5048994719","display_name":"Qiang Chen","orcid":"https://orcid.org/0000-0001-9954-059X"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]},{"id":"https://openalex.org/I4391767673","display_name":"State Key Laboratory of ASIC and System","ror":"https://ror.org/01mamgv83","country_code":null,"type":"facility","lineage":["https://openalex.org/I24943067","https://openalex.org/I4391767673"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Qiang Chen","raw_affiliation_strings":["State Key Laboratory of ASIC and Systems, Fudan University, Shanghai, China","State Key Lab. of ASIC & Syst. Fudan Univ., Shanghai, China"],"affiliations":[{"raw_affiliation_string":"State Key Laboratory of ASIC and Systems, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]},{"raw_affiliation_string":"State Key Lab. of ASIC & Syst. Fudan Univ., Shanghai, China","institution_ids":["https://openalex.org/I24943067","https://openalex.org/I4391767673"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5004502095","display_name":"Jie Sun","orcid":"https://orcid.org/0000-0003-2553-1804"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]},{"id":"https://openalex.org/I4391767673","display_name":"State Key Laboratory of ASIC and System","ror":"https://ror.org/01mamgv83","country_code":null,"type":"facility","lineage":["https://openalex.org/I24943067","https://openalex.org/I4391767673"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Jie Sun","raw_affiliation_strings":["State Key Laboratory of ASIC and Systems, Fudan University, Shanghai, China","State Key Lab. of ASIC & Syst. Fudan Univ., Shanghai, China"],"affiliations":[{"raw_affiliation_string":"State Key Laboratory of ASIC and Systems, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]},{"raw_affiliation_string":"State Key Lab. of ASIC & Syst. Fudan Univ., Shanghai, China","institution_ids":["https://openalex.org/I24943067","https://openalex.org/I4391767673"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5103131026"],"corresponding_institution_ids":["https://openalex.org/I24943067","https://openalex.org/I4391767673"],"apc_list":null,"apc_paid":null,"fwci":0.2365,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.62566912,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":"57","issue":null,"first_page":"737","last_page":"740"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11248","display_name":"Advanced Power Amplifier Design","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9983999729156494,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/linearity","display_name":"Linearity","score":0.8674036264419556},{"id":"https://openalex.org/keywords/wideband","display_name":"Wideband","score":0.5670667886734009},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.45668283104896545},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.40400514006614685},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3997763991355896},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.3661035895347595},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2734379768371582}],"concepts":[{"id":"https://openalex.org/C77170095","wikidata":"https://www.wikidata.org/wiki/Q1753188","display_name":"Linearity","level":2,"score":0.8674036264419556},{"id":"https://openalex.org/C2780202535","wikidata":"https://www.wikidata.org/wiki/Q4524457","display_name":"Wideband","level":2,"score":0.5670667886734009},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.45668283104896545},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.40400514006614685},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3997763991355896},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.3661035895347595},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2734379768371582}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas.2013.6571952","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2013.6571952","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 IEEE International Symposium on Circuits and Systems (ISCAS2013)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W414335246","https://openalex.org/W1566916904","https://openalex.org/W2020195524","https://openalex.org/W2073741730","https://openalex.org/W2101662742","https://openalex.org/W2115671655","https://openalex.org/W2131917361","https://openalex.org/W2146167262","https://openalex.org/W2148789056","https://openalex.org/W2163415249","https://openalex.org/W2167329705","https://openalex.org/W4238625116","https://openalex.org/W6677316831"],"related_works":["https://openalex.org/W2748952813","https://openalex.org/W3014521742","https://openalex.org/W2023858428","https://openalex.org/W3112081258","https://openalex.org/W1480343695","https://openalex.org/W2538259895","https://openalex.org/W2109445684","https://openalex.org/W171113498","https://openalex.org/W2081082331","https://openalex.org/W2124661899"],"abstract_inverted_index":{"A":[0],"low-power,":[1],"high":[2],"linearity":[3,29,47],"and":[4,72,89,115],"wideband":[5],"passive":[6,13,76],"mixer":[7,14,77,105],"for":[8],"SDR":[9],"is":[10,56,64,109],"presented":[11],"The":[12,75],"employs":[15],"the":[16,28,33,42,50,68,104],"improved":[17],"current-reuse":[18],"Gm":[19],"stage,":[20],"combines":[21],"source":[22],"degeneration":[23],"with":[24],"MGTR":[25],"to":[26,58],"extend":[27],"region":[30],"while":[31],"enhance":[32],"IIP":[34,81],"<sub":[35,61,82],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[36,62,83,112],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">3</sub>":[37,84],"performance":[38],"Measured":[39],"results":[40],"show":[41],"design":[43],"achieves":[44,78],"a":[45,119],"good":[46],"even":[48],"though":[49],"power":[51],"of":[52],"input":[53],"RF":[54],"signal":[55],"up":[57],"-14dBm":[59],"(V":[60],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">pp</sub>":[63],"about":[65],"160mV,":[66],"consider":[67],"balun's":[69],"voltage":[70],"gain":[71,96],"insert":[73],"loss).":[74],"10.7-13.8":[79],"dBm":[80],",":[85,114],"IIP2":[86],">":[87],"44dB,":[88],"13.7dB":[90],"NF":[91],"under":[92],"13dB":[93],"Max":[94],"conversion":[95],"at":[97],"900MHz.":[98],"Implemented":[99],"in":[100],"65nm":[101],"CMOS":[102],"process,":[103],"core":[106],"die":[107],"area":[108],"0.2mm":[110],"<sup":[111],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">2</sup>":[113],"consumes":[116],"6.7mA":[117],"from":[118],"1.2V":[120],"supply.":[121]},"counts_by_year":[{"year":2021,"cited_by_count":3},{"year":2020,"cited_by_count":1},{"year":2015,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
