{"id":"https://openalex.org/W2093465172","doi":"https://doi.org/10.1109/iscas.2012.6271934","title":"MRAM crossbar based configurable logic block","display_name":"MRAM crossbar based configurable logic block","publication_year":2012,"publication_date":"2012-05-01","ids":{"openalex":"https://openalex.org/W2093465172","doi":"https://doi.org/10.1109/iscas.2012.6271934","mag":"2093465172"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2012.6271934","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2012.6271934","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 IEEE International Symposium on Circuits and Systems","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5035816804","display_name":"Yahya Lakys","orcid":"https://orcid.org/0000-0002-0709-1027"},"institutions":[{"id":"https://openalex.org/I102197404","display_name":"Universit\u00e9 Paris-Sud","ror":"https://ror.org/028rypz17","country_code":"FR","type":"education","lineage":["https://openalex.org/I102197404"]},{"id":"https://openalex.org/I1294671590","display_name":"Centre National de la Recherche Scientifique","ror":"https://ror.org/02feahw73","country_code":"FR","type":"government","lineage":["https://openalex.org/I1294671590"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Yahya Lakys","raw_affiliation_strings":["LIEF, University Paris Sud, Orsay, France","UMR 8622, CNRS, Orsay, France"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"LIEF, University Paris Sud, Orsay, France","institution_ids":["https://openalex.org/I102197404"]},{"raw_affiliation_string":"UMR 8622, CNRS, Orsay, France","institution_ids":["https://openalex.org/I1294671590"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5066473925","display_name":"Weisheng Zhao","orcid":"https://orcid.org/0000-0001-8088-0404"},"institutions":[{"id":"https://openalex.org/I102197404","display_name":"Universit\u00e9 Paris-Sud","ror":"https://ror.org/028rypz17","country_code":"FR","type":"education","lineage":["https://openalex.org/I102197404"]},{"id":"https://openalex.org/I1294671590","display_name":"Centre National de la Recherche Scientifique","ror":"https://ror.org/02feahw73","country_code":"FR","type":"government","lineage":["https://openalex.org/I1294671590"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Weisheng Zhao","raw_affiliation_strings":["LIEF, University Paris Sud, Orsay, France","UMR 8622, CNRS, Orsay, France"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"LIEF, University Paris Sud, Orsay, France","institution_ids":["https://openalex.org/I102197404"]},{"raw_affiliation_string":"UMR 8622, CNRS, Orsay, France","institution_ids":["https://openalex.org/I1294671590"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5102978184","display_name":"Jacques\u2010Olivier Klein","orcid":"https://orcid.org/0000-0002-6923-5276"},"institutions":[{"id":"https://openalex.org/I102197404","display_name":"Universit\u00e9 Paris-Sud","ror":"https://ror.org/028rypz17","country_code":"FR","type":"education","lineage":["https://openalex.org/I102197404"]},{"id":"https://openalex.org/I1294671590","display_name":"Centre National de la Recherche Scientifique","ror":"https://ror.org/02feahw73","country_code":"FR","type":"government","lineage":["https://openalex.org/I1294671590"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Jacques-Olivier Klein","raw_affiliation_strings":["LIEF, University Paris Sud, Orsay, France","UMR 8622, CNRS, Orsay, France"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"LIEF, University Paris Sud, Orsay, France","institution_ids":["https://openalex.org/I102197404"]},{"raw_affiliation_string":"UMR 8622, CNRS, Orsay, France","institution_ids":["https://openalex.org/I1294671590"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5103518479","display_name":"Claude Chappert","orcid":null},"institutions":[{"id":"https://openalex.org/I102197404","display_name":"Universit\u00e9 Paris-Sud","ror":"https://ror.org/028rypz17","country_code":"FR","type":"education","lineage":["https://openalex.org/I102197404"]},{"id":"https://openalex.org/I1294671590","display_name":"Centre National de la Recherche Scientifique","ror":"https://ror.org/02feahw73","country_code":"FR","type":"government","lineage":["https://openalex.org/I1294671590"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Claude Chappert","raw_affiliation_strings":["LIEF, University Paris Sud, Orsay, France","UMR 8622, CNRS, Orsay, France"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"LIEF, University Paris Sud, Orsay, France","institution_ids":["https://openalex.org/I102197404"]},{"raw_affiliation_string":"UMR 8622, CNRS, Orsay, France","institution_ids":["https://openalex.org/I1294671590"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.2492,"has_fulltext":false,"cited_by_count":14,"citation_normalized_percentile":{"value":0.82290086,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"2945","last_page":"2948"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/crossbar-switch","display_name":"Crossbar switch","score":0.7312467694282532},{"id":"https://openalex.org/keywords/standby-power","display_name":"Standby power","score":0.6860887408256531},{"id":"https://openalex.org/keywords/magnetoresistive-random-access-memory","display_name":"Magnetoresistive random-access memory","score":0.6824338436126709},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6060693264007568},{"id":"https://openalex.org/keywords/control-reconfiguration","display_name":"Control reconfiguration","score":0.5646635293960571},{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.5455781817436218},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.510814905166626},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5096559524536133},{"id":"https://openalex.org/keywords/handshaking","display_name":"Handshaking","score":0.5094857811927795},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.46060022711753845},{"id":"https://openalex.org/keywords/logic-block","display_name":"Logic block","score":0.4571402668952942},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.4264160692691803},{"id":"https://openalex.org/keywords/programmable-logic-device","display_name":"Programmable logic device","score":0.41922879219055176},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.38260045647621155},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3240354657173157},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.31378209590911865},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.25453323125839233},{"id":"https://openalex.org/keywords/random-access-memory","display_name":"Random access memory","score":0.15596523880958557},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.13149452209472656},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.1018800437450409}],"concepts":[{"id":"https://openalex.org/C29984679","wikidata":"https://www.wikidata.org/wiki/Q1929149","display_name":"Crossbar switch","level":2,"score":0.7312467694282532},{"id":"https://openalex.org/C7140552","wikidata":"https://www.wikidata.org/wiki/Q1366402","display_name":"Standby power","level":3,"score":0.6860887408256531},{"id":"https://openalex.org/C46891859","wikidata":"https://www.wikidata.org/wiki/Q1061546","display_name":"Magnetoresistive random-access memory","level":3,"score":0.6824338436126709},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6060693264007568},{"id":"https://openalex.org/C119701452","wikidata":"https://www.wikidata.org/wiki/Q5165881","display_name":"Control reconfiguration","level":2,"score":0.5646635293960571},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.5455781817436218},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.510814905166626},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5096559524536133},{"id":"https://openalex.org/C58861099","wikidata":"https://www.wikidata.org/wiki/Q548838","display_name":"Handshaking","level":2,"score":0.5094857811927795},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.46060022711753845},{"id":"https://openalex.org/C2778325283","wikidata":"https://www.wikidata.org/wiki/Q1125244","display_name":"Logic block","level":3,"score":0.4571402668952942},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.4264160692691803},{"id":"https://openalex.org/C206274596","wikidata":"https://www.wikidata.org/wiki/Q1063837","display_name":"Programmable logic device","level":2,"score":0.41922879219055176},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.38260045647621155},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3240354657173157},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.31378209590911865},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.25453323125839233},{"id":"https://openalex.org/C2994168587","wikidata":"https://www.wikidata.org/wiki/Q5295","display_name":"Random access memory","level":2,"score":0.15596523880958557},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.13149452209472656},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.1018800437450409},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas.2012.6271934","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2012.6271934","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 IEEE International Symposium on Circuits and Systems","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8899999856948853,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320320883","display_name":"Agence Nationale de la Recherche","ror":"https://ror.org/00rbzpz17"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":23,"referenced_works":["https://openalex.org/W1941487794","https://openalex.org/W1995393072","https://openalex.org/W2014178805","https://openalex.org/W2022691368","https://openalex.org/W2025173691","https://openalex.org/W2025674646","https://openalex.org/W2031539925","https://openalex.org/W2050111978","https://openalex.org/W2055549420","https://openalex.org/W2056921694","https://openalex.org/W2064756415","https://openalex.org/W2067546549","https://openalex.org/W2069006114","https://openalex.org/W2073091054","https://openalex.org/W2084472194","https://openalex.org/W2105401464","https://openalex.org/W2110276925","https://openalex.org/W2113434961","https://openalex.org/W2114601050","https://openalex.org/W2118331930","https://openalex.org/W2135965268","https://openalex.org/W2155814884","https://openalex.org/W3142526730"],"related_works":["https://openalex.org/W2164363068","https://openalex.org/W2150194641","https://openalex.org/W2145701142","https://openalex.org/W1640108110","https://openalex.org/W2808635328","https://openalex.org/W1966868317","https://openalex.org/W2129019972","https://openalex.org/W2010995573","https://openalex.org/W2121539644","https://openalex.org/W2093465172"],"abstract_inverted_index":{"Spintronics-based":[0],"non-volatile":[1],"storage":[2],"devices":[3],"promise":[4],"great":[5],"potential":[6],"to":[7,13,19,67,78],"be":[8,61,74,113],"integrated":[9],"in":[10,91],"reconfigurable":[11],"circuits":[12],"overcome":[14],"the":[15,70,79],"major":[16],"hurdles":[17],"related":[18],"conventional":[20,68],"flash":[21],"and":[22,33,86],"SRAM":[23],"memories,":[24],"such":[25],"as":[26],"low":[27,116],"logic":[28,48,58],"density,":[29],"high":[30,84],"standby":[31,71],"power":[32,72,87],"long":[34],"(re)":[35],"boot":[36],"latency.":[37],"In":[38],"this":[39],"paper,":[40],"we":[41],"describe":[42],"a":[43],"compact":[44],"design":[45],"of":[46,81],"configurable":[47],"block":[49],"based":[50],"on":[51],"Magnetic":[52],"RAM":[53],"(MRAM)":[54],"crossbar":[55],"architecture.":[56],"The":[57],"density":[59],"can":[60,73],"increased":[62],"greatly":[63],"(~5":[64],"times)":[65],"compared":[66],"designs;":[69],"nearly":[75],"zero":[76],"thanks":[77],"non-volatility":[80],"MRAM.":[82],"Its":[83],"speed":[85],"efficiency":[88],"(~10.4":[89],"Tera-OPS/Watt":[90],"computing":[92],"mode)":[93],"are":[94],"also":[95,109],"demonstrated":[96],"through":[97,105],"mixed":[98],"CMOS/Magnetic":[99],"spice":[100],"simulations.":[101],"Fully":[102],"dynamic":[103],"reconfiguration":[104],"context":[106],"switching":[107],"is":[108],"studied,":[110],"which":[111],"could":[112],"achieved":[114],"with":[115],"area":[117],"overhead.":[118]},"counts_by_year":[{"year":2023,"cited_by_count":2},{"year":2021,"cited_by_count":1},{"year":2018,"cited_by_count":2},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":3},{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":2},{"year":2013,"cited_by_count":2}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}