{"id":"https://openalex.org/W2131670067","doi":"https://doi.org/10.1109/iscas.2012.6271800","title":"Two-port low-power gain-cell storage array: Voltage scaling and retention time","display_name":"Two-port low-power gain-cell storage array: Voltage scaling and retention time","publication_year":2012,"publication_date":"2012-05-01","ids":{"openalex":"https://openalex.org/W2131670067","doi":"https://doi.org/10.1109/iscas.2012.6271800","mag":"2131670067"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2012.6271800","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2012.6271800","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 IEEE International Symposium on Circuits and Systems","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"http://infoscience.epfl.ch/record/178154","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5026237780","display_name":"Rashid Iqbal","orcid":"https://orcid.org/0000-0003-2953-6725"},"institutions":[{"id":"https://openalex.org/I5124864","display_name":"\u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne","ror":"https://ror.org/02s376052","country_code":"CH","type":"education","lineage":["https://openalex.org/I2799323385","https://openalex.org/I5124864"]}],"countries":["CH"],"is_corresponding":true,"raw_author_name":"Rashid Iqbal","raw_affiliation_strings":["Institute of Electrical Engineering, EPF Lausanne, Lausanne, Switzerland","Institute of Electrical Engineering, EPFL, Lausanne, VD, 1015 Switzerland"],"affiliations":[{"raw_affiliation_string":"Institute of Electrical Engineering, EPF Lausanne, Lausanne, Switzerland","institution_ids":["https://openalex.org/I5124864"]},{"raw_affiliation_string":"Institute of Electrical Engineering, EPFL, Lausanne, VD, 1015 Switzerland","institution_ids":["https://openalex.org/I5124864"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5026324911","display_name":"Pascal Meinerzhagen","orcid":"https://orcid.org/0000-0002-5444-5772"},"institutions":[{"id":"https://openalex.org/I5124864","display_name":"\u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne","ror":"https://ror.org/02s376052","country_code":"CH","type":"education","lineage":["https://openalex.org/I2799323385","https://openalex.org/I5124864"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Pascal Meinerzhagen","raw_affiliation_strings":["Institute of Electrical Engineering, EPF Lausanne, Lausanne, Switzerland","Institute of Electrical Engineering, EPFL, Lausanne, VD, 1015 Switzerland"],"affiliations":[{"raw_affiliation_string":"Institute of Electrical Engineering, EPF Lausanne, Lausanne, Switzerland","institution_ids":["https://openalex.org/I5124864"]},{"raw_affiliation_string":"Institute of Electrical Engineering, EPFL, Lausanne, VD, 1015 Switzerland","institution_ids":["https://openalex.org/I5124864"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5059133771","display_name":"Andreas Burg","orcid":"https://orcid.org/0000-0002-7270-5558"},"institutions":[{"id":"https://openalex.org/I5124864","display_name":"\u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne","ror":"https://ror.org/02s376052","country_code":"CH","type":"education","lineage":["https://openalex.org/I2799323385","https://openalex.org/I5124864"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Andreas Burg","raw_affiliation_strings":["Institute of Electrical Engineering, EPF Lausanne, Lausanne, Switzerland","Institute of Electrical Engineering, EPFL, Lausanne, VD, 1015 Switzerland"],"affiliations":[{"raw_affiliation_string":"Institute of Electrical Engineering, EPF Lausanne, Lausanne, Switzerland","institution_ids":["https://openalex.org/I5124864"]},{"raw_affiliation_string":"Institute of Electrical Engineering, EPFL, Lausanne, VD, 1015 Switzerland","institution_ids":["https://openalex.org/I5124864"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5026237780"],"corresponding_institution_ids":["https://openalex.org/I5124864"],"apc_list":null,"apc_paid":null,"fwci":1.4939,"has_fulltext":false,"cited_by_count":14,"citation_normalized_percentile":{"value":0.84721287,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"2469","last_page":"2472"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.665501594543457},{"id":"https://openalex.org/keywords/data-retention","display_name":"Data retention","score":0.6071876287460327},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5828101634979248},{"id":"https://openalex.org/keywords/port","display_name":"Port (circuit theory)","score":0.5698575377464294},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.5585099458694458},{"id":"https://openalex.org/keywords/low-voltage","display_name":"Low voltage","score":0.5365628600120544},{"id":"https://openalex.org/keywords/retention-time","display_name":"Retention time","score":0.5140758752822876},{"id":"https://openalex.org/keywords/scaling","display_name":"Scaling","score":0.47004595398902893},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.4647618532180786},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.45291823148727417},{"id":"https://openalex.org/keywords/low-power-electronics","display_name":"Low-power electronics","score":0.44046199321746826},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4079045057296753},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.31727153062820435},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.15564650297164917},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.09943997859954834},{"id":"https://openalex.org/keywords/chemistry","display_name":"Chemistry","score":0.07530570030212402}],"concepts":[{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.665501594543457},{"id":"https://openalex.org/C2780866740","wikidata":"https://www.wikidata.org/wiki/Q5227345","display_name":"Data retention","level":2,"score":0.6071876287460327},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5828101634979248},{"id":"https://openalex.org/C32802771","wikidata":"https://www.wikidata.org/wiki/Q2443617","display_name":"Port (circuit theory)","level":2,"score":0.5698575377464294},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.5585099458694458},{"id":"https://openalex.org/C128624480","wikidata":"https://www.wikidata.org/wiki/Q1504817","display_name":"Low voltage","level":3,"score":0.5365628600120544},{"id":"https://openalex.org/C3020018676","wikidata":"https://www.wikidata.org/wiki/Q170050","display_name":"Retention time","level":2,"score":0.5140758752822876},{"id":"https://openalex.org/C99844830","wikidata":"https://www.wikidata.org/wiki/Q102441924","display_name":"Scaling","level":2,"score":0.47004595398902893},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.4647618532180786},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.45291823148727417},{"id":"https://openalex.org/C117551214","wikidata":"https://www.wikidata.org/wiki/Q6692774","display_name":"Low-power electronics","level":4,"score":0.44046199321746826},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4079045057296753},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.31727153062820435},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.15564650297164917},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.09943997859954834},{"id":"https://openalex.org/C185592680","wikidata":"https://www.wikidata.org/wiki/Q2329","display_name":"Chemistry","level":0,"score":0.07530570030212402},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C2984118289","wikidata":"https://www.wikidata.org/wiki/Q29954","display_name":"Power consumption","level":3,"score":0.0},{"id":"https://openalex.org/C43617362","wikidata":"https://www.wikidata.org/wiki/Q170050","display_name":"Chromatography","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/iscas.2012.6271800","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2012.6271800","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 IEEE International Symposium on Circuits and Systems","raw_type":"proceedings-article"},{"id":"pmh:oai:infoscience.epfl.ch:178154","is_oa":true,"landing_page_url":"http://infoscience.epfl.ch/record/178154","pdf_url":null,"source":{"id":"https://openalex.org/S4306400487","display_name":"Infoscience (Ecole Polytechnique F\u00e9d\u00e9rale de Lausanne)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"Text"}],"best_oa_location":{"id":"pmh:oai:infoscience.epfl.ch:178154","is_oa":true,"landing_page_url":"http://infoscience.epfl.ch/record/178154","pdf_url":null,"source":{"id":"https://openalex.org/S4306400487","display_name":"Infoscience (Ecole Polytechnique F\u00e9d\u00e9rale de Lausanne)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"Text"},"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.8600000143051147,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":17,"referenced_works":["https://openalex.org/W1940446526","https://openalex.org/W1977443758","https://openalex.org/W2033951705","https://openalex.org/W2058857722","https://openalex.org/W2084514439","https://openalex.org/W2094720587","https://openalex.org/W2097825079","https://openalex.org/W2098404312","https://openalex.org/W2137956450","https://openalex.org/W2144289559","https://openalex.org/W2149521191","https://openalex.org/W2158622216","https://openalex.org/W2159501742","https://openalex.org/W2161091390","https://openalex.org/W3151434794","https://openalex.org/W6640883792","https://openalex.org/W6680537189"],"related_works":["https://openalex.org/W2143400404","https://openalex.org/W2801267388","https://openalex.org/W2807138148","https://openalex.org/W1869904472","https://openalex.org/W2109360204","https://openalex.org/W2123226820","https://openalex.org/W3103819855","https://openalex.org/W3217007046","https://openalex.org/W4225327811","https://openalex.org/W2126248063"],"abstract_inverted_index":{"The":[0,27,101],"impact":[1],"of":[2,10,89,92,111],"supply":[3,37,56,75,114],"voltage":[4,38,71,115],"scaling":[5,34],"on":[6],"the":[7,36,58,67,74,112,118],"retention":[8,28,59],"time":[9,29,60],"a":[11,40,45,54,70,93,125,130],"2-transistor":[12],"(2T)":[13],"gain-cell":[14],"(GC)":[15],"storage":[16,104],"array":[17,95],"is":[18,106],"investigated,":[19],"in":[20,97],"order":[21],"to":[22,69,120,129],"enable":[23,121],"low-power/low-voltage":[24],"data":[25],"storage.":[26],"can":[30,61],"be":[31,62],"increased":[32,64],"when":[33],"down":[35],"for":[39,53],"given":[41,46,55],"access":[42],"statistics":[43],"and":[44,79,116],"write":[47],"bit-line":[48],"(WBL)":[49],"control":[50],"scheme.":[51],"Moreover,":[52],"voltage,":[57],"further":[63],"by":[65,87],"controlling":[66],"WBL":[68],"level":[72],"between":[73],"rails":[76],"during":[77],"idle":[78],"read":[80],"states.":[81],"These":[82],"two":[83],"concepts":[84],"are":[85],"proved":[86],"means":[88],"Spectre":[90],"simulation":[91],"GC-storage":[94],"implemented":[96],"180-nm":[98],"CMOS":[99],"technology.":[100],"proposed":[102],"2-kb":[103],"macro":[105],"operated":[107],"at":[108],"only":[109],"40%":[110],"nominal":[113],"leverages":[117],"GCs":[119],"two-port":[122],"operation":[123],"with":[124],"negligible":[126],"area-increase":[127],"compared":[128],"single-port":[131],"implementation.":[132]},"counts_by_year":[{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":4},{"year":2016,"cited_by_count":3},{"year":2015,"cited_by_count":1},{"year":2013,"cited_by_count":3},{"year":2012,"cited_by_count":2}],"updated_date":"2026-04-04T16:13:02.066488","created_date":"2025-10-10T00:00:00"}
