{"id":"https://openalex.org/W2046211205","doi":"https://doi.org/10.1109/iscas.2010.5538014","title":"A 5-GHz fractional-N phase-locked loop with spur reduction technique in 0.13-μm CMOS","display_name":"A 5-GHz fractional-N phase-locked loop with spur reduction technique in 0.13-μm CMOS","publication_year":2010,"publication_date":"2010-05-01","ids":{"openalex":"https://openalex.org/W2046211205","doi":"https://doi.org/10.1109/iscas.2010.5538014","mag":"2046211205"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2010.5538014","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2010.5538014","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of 2010 IEEE International Symposium on Circuits and Systems","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5113910295","display_name":"Wei-Hao Chiu","orcid":null},"institutions":[{"id":"https://openalex.org/I16733864","display_name":"National Taiwan University","ror":"https://ror.org/05bqach95","country_code":"TW","type":"education","lineage":["https://openalex.org/I16733864"]}],"countries":["TW"],"is_corresponding":true,"raw_author_name":"Wei-Hao Chiu","raw_affiliation_strings":["Graduate Institute of Electronics Engineering and Department of Electrical Engineering, National Taiwan University, Taipei, Taiwan","Graduate Institute of Electronics Engineering, and Department of Electrical Engineering, National Taiwan University, Taipei, Taiwan"],"affiliations":[{"raw_affiliation_string":"Graduate Institute of Electronics Engineering and Department of Electrical Engineering, National Taiwan University, Taipei, Taiwan","institution_ids":["https://openalex.org/I16733864"]},{"raw_affiliation_string":"Graduate Institute of Electronics Engineering, and Department of Electrical Engineering, National Taiwan University, Taipei, Taiwan","institution_ids":["https://openalex.org/I16733864"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5110087533","display_name":"Chien-Yuan Cheng","orcid":null},"institutions":[{"id":"https://openalex.org/I16733864","display_name":"National Taiwan University","ror":"https://ror.org/05bqach95","country_code":"TW","type":"education","lineage":["https://openalex.org/I16733864"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Chien-Yuan Cheng","raw_affiliation_strings":["Graduate Institute of Electronics Engineering and Department of Electrical Engineering, National Taiwan University, Taipei, Taiwan","Graduate Institute of Electronics Engineering, and Department of Electrical Engineering, National Taiwan University, Taipei, Taiwan"],"affiliations":[{"raw_affiliation_string":"Graduate Institute of Electronics Engineering and Department of Electrical Engineering, National Taiwan University, Taipei, Taiwan","institution_ids":["https://openalex.org/I16733864"]},{"raw_affiliation_string":"Graduate Institute of Electronics Engineering, and Department of Electrical Engineering, National Taiwan University, Taipei, Taiwan","institution_ids":["https://openalex.org/I16733864"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5027314134","display_name":"Tsung\u2010Hsien Lin","orcid":"https://orcid.org/0000-0002-1733-5945"},"institutions":[{"id":"https://openalex.org/I16733864","display_name":"National Taiwan University","ror":"https://ror.org/05bqach95","country_code":"TW","type":"education","lineage":["https://openalex.org/I16733864"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Tsung-Hsien Lin","raw_affiliation_strings":["Graduate Institute of Electronics Engineering and Department of Electrical Engineering, National Taiwan University, Taipei, Taiwan","Graduate Institute of Electronics Engineering, and Department of Electrical Engineering, National Taiwan University, Taipei, Taiwan"],"affiliations":[{"raw_affiliation_string":"Graduate Institute of Electronics Engineering and Department of Electrical Engineering, National Taiwan University, Taipei, Taiwan","institution_ids":["https://openalex.org/I16733864"]},{"raw_affiliation_string":"Graduate Institute of Electronics Engineering, and Department of Electrical Engineering, National Taiwan University, Taipei, Taiwan","institution_ids":["https://openalex.org/I16733864"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5113910295"],"corresponding_institution_ids":["https://openalex.org/I16733864"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.11216434,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":"56","issue":null,"first_page":"2996","last_page":"2999"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9972000122070312,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.8567105531692505},{"id":"https://openalex.org/keywords/spur","display_name":"Spur","score":0.828027606010437},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.7249563932418823},{"id":"https://openalex.org/keywords/compensation","display_name":"Compensation (psychology)","score":0.6945584416389465},{"id":"https://openalex.org/keywords/loop","display_name":"Loop (graph theory)","score":0.5744574666023254},{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.4858788847923279},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4550226628780365},{"id":"https://openalex.org/keywords/phase","display_name":"Phase (matter)","score":0.44586458802223206},{"id":"https://openalex.org/keywords/control-theory","display_name":"Control theory (sociology)","score":0.444352388381958},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.4432337284088135},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.37214773893356323},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.32757502794265747},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.32438963651657104},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.22171977162361145},{"id":"https://openalex.org/keywords/phase-noise","display_name":"Phase noise","score":0.19612550735473633},{"id":"https://openalex.org/keywords/combinatorics","display_name":"Combinatorics","score":0.07651197910308838},{"id":"https://openalex.org/keywords/quantum-mechanics","display_name":"Quantum mechanics","score":0.06341493129730225}],"concepts":[{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.8567105531692505},{"id":"https://openalex.org/C2779821383","wikidata":"https://www.wikidata.org/wiki/Q7581537","display_name":"Spur","level":2,"score":0.828027606010437},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.7249563932418823},{"id":"https://openalex.org/C2780023022","wikidata":"https://www.wikidata.org/wiki/Q1338171","display_name":"Compensation (psychology)","level":2,"score":0.6945584416389465},{"id":"https://openalex.org/C184670325","wikidata":"https://www.wikidata.org/wiki/Q512604","display_name":"Loop (graph theory)","level":2,"score":0.5744574666023254},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.4858788847923279},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4550226628780365},{"id":"https://openalex.org/C44280652","wikidata":"https://www.wikidata.org/wiki/Q104837","display_name":"Phase (matter)","level":2,"score":0.44586458802223206},{"id":"https://openalex.org/C47446073","wikidata":"https://www.wikidata.org/wiki/Q5165890","display_name":"Control theory (sociology)","level":3,"score":0.444352388381958},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.4432337284088135},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.37214773893356323},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.32757502794265747},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.32438963651657104},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.22171977162361145},{"id":"https://openalex.org/C89631360","wikidata":"https://www.wikidata.org/wiki/Q1428766","display_name":"Phase noise","level":2,"score":0.19612550735473633},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.07651197910308838},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.06341493129730225},{"id":"https://openalex.org/C66938386","wikidata":"https://www.wikidata.org/wiki/Q633538","display_name":"Structural engineering","level":1,"score":0.0},{"id":"https://openalex.org/C2775924081","wikidata":"https://www.wikidata.org/wiki/Q55608371","display_name":"Control (management)","level":2,"score":0.0},{"id":"https://openalex.org/C15744967","wikidata":"https://www.wikidata.org/wiki/Q9418","display_name":"Psychology","level":0,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0},{"id":"https://openalex.org/C11171543","wikidata":"https://www.wikidata.org/wiki/Q41630","display_name":"Psychoanalysis","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas.2010.5538014","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2010.5538014","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of 2010 IEEE International Symposium on Circuits and Systems","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.9100000262260437,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320321040","display_name":"National Science Council","ror":"https://ror.org/02kv4zf79"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":5,"referenced_works":["https://openalex.org/W1965174157","https://openalex.org/W1975831661","https://openalex.org/W2072192908","https://openalex.org/W2146298723","https://openalex.org/W4285719527"],"related_works":["https://openalex.org/W2242079364","https://openalex.org/W2317410790","https://openalex.org/W191859820","https://openalex.org/W2152768744","https://openalex.org/W2504787585","https://openalex.org/W2132407575","https://openalex.org/W2326560183","https://openalex.org/W2353997301","https://openalex.org/W2767220727","https://openalex.org/W1982727549"],"abstract_inverted_index":{"This":[0,64],"work":[1],"proposes":[2],"a":[3,10,26,54,60],"fractional":[4,18,38,94],"phase":[5,39],"error":[6],"compensation":[7,23,56,91],"approach":[8],"for":[9],"classical":[11,99],"fractional-N":[12,47,100],"phase-locked":[13],"loop":[14],"(PLL)":[15],"to":[16,35],"reduce":[17],"spurs.":[19],"The":[20,41,74,82],"proposed":[21,46,89],"corresponding-phase":[22,90],"technique":[24],"incorporates":[25],"divider":[27],"array":[28],"and":[29],"an":[30],"auxiliary":[31],"charge":[32],"pump":[33],"pair":[34],"overcome":[36],"the":[37,45,69,88,93],"error.":[40],"main":[42],"advantage":[43],"of":[44],"PLL":[48,65],"is":[49,66,78],"that":[50],"it":[51],"only":[52],"uses":[53],"constant":[55],"ratio":[57],"when":[58],"being":[59],"desired":[61],"divide":[62],"ratio.":[63],"fabricated":[67],"in":[68],"TSMC":[70],"0.13-\u03bcm":[71],"CMOS":[72],"process.":[73],"total":[75],"power":[76],"consumption":[77],"about":[79],"17":[80],"mW.":[81],"measured":[83],"results":[84],"show":[85],"that,":[86],"with":[87],"technique,":[92],"spurs":[95],"are":[96],"reduced":[97],"under":[98],"PLL.":[101]},"counts_by_year":[{"year":2015,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}