{"id":"https://openalex.org/W1967651346","doi":"https://doi.org/10.1109/iscas.2010.5537686","title":"A flexible LDPC decoder architecture supporting two decoding algorithms","display_name":"A flexible LDPC decoder architecture supporting two decoding algorithms","publication_year":2010,"publication_date":"2010-05-01","ids":{"openalex":"https://openalex.org/W1967651346","doi":"https://doi.org/10.1109/iscas.2010.5537686","mag":"1967651346"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2010.5537686","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2010.5537686","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of 2010 IEEE International Symposium on Circuits and Systems","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5085412779","display_name":"Shuangqu Huang","orcid":null},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Shuangqu Huang","raw_affiliation_strings":["State Key Laboratory of ASIC, System Fudan University, Shanghai, China","State Key Laboratory of ASIC and System, Fudan University, No. 825 Zhangheng Road, Shanghai, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"State Key Laboratory of ASIC, System Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]},{"raw_affiliation_string":"State Key Laboratory of ASIC and System, Fudan University, No. 825 Zhangheng Road, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5036499408","display_name":"Dan Bao","orcid":"https://orcid.org/0000-0002-7727-3037"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Dan Bao","raw_affiliation_strings":["State Key Laboratory of ASIC, System Fudan University, Shanghai, China","State Key Laboratory of ASIC and System, Fudan University, No. 825 Zhangheng Road, Shanghai, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"State Key Laboratory of ASIC, System Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]},{"raw_affiliation_string":"State Key Laboratory of ASIC and System, Fudan University, No. 825 Zhangheng Road, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5102022203","display_name":"Bo Xiang","orcid":"https://orcid.org/0000-0002-3020-2223"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Bo Xiang","raw_affiliation_strings":["State Key Laboratory of ASIC, System Fudan University, Shanghai, China","State Key Laboratory of ASIC and System, Fudan University, No. 825 Zhangheng Road, Shanghai, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"State Key Laboratory of ASIC, System Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]},{"raw_affiliation_string":"State Key Laboratory of ASIC and System, Fudan University, No. 825 Zhangheng Road, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101996379","display_name":"Yun Chen","orcid":"https://orcid.org/0000-0002-3736-9456"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yun Chen","raw_affiliation_strings":["State Key Laboratory of ASIC, System Fudan University, Shanghai, China","State Key Laboratory of ASIC and System, Fudan University, No. 825 Zhangheng Road, Shanghai, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"State Key Laboratory of ASIC, System Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]},{"raw_affiliation_string":"State Key Laboratory of ASIC and System, Fudan University, No. 825 Zhangheng Road, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100656792","display_name":"Xiaoyang Zeng","orcid":"https://orcid.org/0000-0003-3986-137X"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xiaoyang Zeng","raw_affiliation_strings":["State Key Laboratory of ASIC, System Fudan University, Shanghai, China","State Key Laboratory of ASIC and System, Fudan University, No. 825 Zhangheng Road, Shanghai, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"State Key Laboratory of ASIC, System Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]},{"raw_affiliation_string":"State Key Laboratory of ASIC and System, Fudan University, No. 825 Zhangheng Road, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I24943067"],"apc_list":null,"apc_paid":null,"fwci":2.0536,"has_fulltext":false,"cited_by_count":16,"citation_normalized_percentile":{"value":0.86233766,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"3929","last_page":"3932"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11321","display_name":"Error Correcting Code Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11321","display_name":"Error Correcting Code Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10125","display_name":"Advanced Wireless Communication Techniques","score":0.9986000061035156,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10796","display_name":"Cooperative Communication and Network Coding","score":0.9921000003814697,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/low-density-parity-check-code","display_name":"Low-density parity-check code","score":0.8432921171188354},{"id":"https://openalex.org/keywords/decoding-methods","display_name":"Decoding methods","score":0.7918974161148071},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6893856525421143},{"id":"https://openalex.org/keywords/block","display_name":"Block (permutation group theory)","score":0.5956358909606934},{"id":"https://openalex.org/keywords/soft-decision-decoder","display_name":"Soft-decision decoder","score":0.5943673253059387},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.5548751354217529},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.44408726692199707},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.4333120584487915},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.4304264783859253},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3794722557067871},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.2856694161891937},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.15416422486305237},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.13969549536705017}],"concepts":[{"id":"https://openalex.org/C67692717","wikidata":"https://www.wikidata.org/wiki/Q187444","display_name":"Low-density parity-check code","level":3,"score":0.8432921171188354},{"id":"https://openalex.org/C57273362","wikidata":"https://www.wikidata.org/wiki/Q576722","display_name":"Decoding methods","level":2,"score":0.7918974161148071},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6893856525421143},{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.5956358909606934},{"id":"https://openalex.org/C185588885","wikidata":"https://www.wikidata.org/wiki/Q7553811","display_name":"Soft-decision decoder","level":3,"score":0.5943673253059387},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.5548751354217529},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.44408726692199707},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.4333120584487915},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.4304264783859253},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3794722557067871},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.2856694161891937},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.15416422486305237},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.13969549536705017},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas.2010.5537686","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2010.5537686","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of 2010 IEEE International Symposium on Circuits and Systems","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.4000000059604645,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":8,"referenced_works":["https://openalex.org/W2097907117","https://openalex.org/W2115353412","https://openalex.org/W2127002303","https://openalex.org/W2128765501","https://openalex.org/W2129475459","https://openalex.org/W2163990740","https://openalex.org/W2536607768","https://openalex.org/W6683745993"],"related_works":["https://openalex.org/W2154078079","https://openalex.org/W4244085088","https://openalex.org/W406587413","https://openalex.org/W2141913236","https://openalex.org/W2353338231","https://openalex.org/W2035769530","https://openalex.org/W2064674583","https://openalex.org/W2077272551","https://openalex.org/W2889372359","https://openalex.org/W4299647765"],"abstract_inverted_index":{"In":[0],"this":[1],"paper":[2],"a":[3,46,57,62],"programmable":[4],"and":[5,68,86],"area-efficient":[6],"decoder":[7,23,49],"architecture":[8],"supporting":[9],"two":[10],"main":[11],"stream":[12],"decoding":[13,34],"algorithms":[14],"for":[15],"any":[16],"Block-LDPC":[17,39],"codes":[18],"is":[19,54,78],"presented.":[20],"The":[21,75],"novel":[22],"can":[24],"be":[25],"configured":[26],"to":[27,37],"decode":[28],"in":[29],"either":[30],"TPMP":[31],"or":[32],"TDMP":[33],"mode":[35],"according":[36],"different":[38],"codes.":[40],"To":[41],"verify":[42],"our":[43],"proposed":[44],"architecture,":[45],"flexible":[47],"LDPC":[48],"which":[50],"supports":[51],"IEEE":[52],"802.16e":[53],"implemented":[55],"using":[56],"0.13um":[58],"CMOS":[59],"process":[60],"with":[61],"total":[63],"area":[64],"of":[65,72],"6.3":[66],"mm2":[67],"maximum":[69],"clock":[70],"frequency":[71],"260":[73],"MHz.":[74],"estimated":[76],"comsumption":[77],"270":[79],"mW":[80],"when":[81],"operates":[82],"at":[83],"125":[84],"MHz":[85],"1.2V":[87],"supply.":[88]},"counts_by_year":[{"year":2021,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2016,"cited_by_count":1},{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":4},{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":4}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
