{"id":"https://openalex.org/W2165462630","doi":"https://doi.org/10.1109/iscas.2010.5537633","title":"Domino ADC: A novel analog-to-digital converter architecture","display_name":"Domino ADC: A novel analog-to-digital converter architecture","publication_year":2010,"publication_date":"2010-05-01","ids":{"openalex":"https://openalex.org/W2165462630","doi":"https://doi.org/10.1109/iscas.2010.5537633","mag":"2165462630"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2010.5537633","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2010.5537633","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of 2010 IEEE International Symposium on Circuits and Systems","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5087282725","display_name":"Mohammad Takhti","orcid":"https://orcid.org/0000-0002-8564-5240"},"institutions":[{"id":"https://openalex.org/I80543232","display_name":"K.N.Toosi University of Technology","ror":"https://ror.org/0433abe34","country_code":"IR","type":"education","lineage":["https://openalex.org/I80543232"]}],"countries":["IR"],"is_corresponding":false,"raw_author_name":"Mohammad Takhti","raw_affiliation_strings":["Integrated Circuits and Systems Laboratory, ECE Department, K.N. Toosi University of Technology, Tehran, Iran"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Integrated Circuits and Systems Laboratory, ECE Department, K.N. Toosi University of Technology, Tehran, Iran","institution_ids":["https://openalex.org/I80543232"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5090141353","display_name":"Amir M. Sodagar","orcid":"https://orcid.org/0000-0002-0552-0203"},"institutions":[{"id":"https://openalex.org/I27837315","display_name":"University of Michigan","ror":"https://ror.org/00jmfr291","country_code":"US","type":"education","lineage":["https://openalex.org/I27837315"]},{"id":"https://openalex.org/I80543232","display_name":"K.N.Toosi University of Technology","ror":"https://ror.org/0433abe34","country_code":"IR","type":"education","lineage":["https://openalex.org/I80543232"]}],"countries":["IR","US"],"is_corresponding":false,"raw_author_name":"Amir M. Sodagar","raw_affiliation_strings":["Center of Wireless Integrated Microsystems (WIMS), University of Michigan, Ann Arbor, MI, USA","Integrated Circuits and Systems Laboratory, ECE Department, K.N. Toosi University of Technology, Tehran, Iran"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Center of Wireless Integrated Microsystems (WIMS), University of Michigan, Ann Arbor, MI, USA","institution_ids":["https://openalex.org/I27837315"]},{"raw_affiliation_string":"Integrated Circuits and Systems Laboratory, ECE Department, K.N. Toosi University of Technology, Tehran, Iran","institution_ids":["https://openalex.org/I80543232"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5101600647","display_name":"Reza Lotfi","orcid":"https://orcid.org/0000-0002-8422-1809"},"institutions":[{"id":"https://openalex.org/I86958956","display_name":"Ferdowsi University of Mashhad","ror":"https://ror.org/00g6ka752","country_code":"IR","type":"education","lineage":["https://openalex.org/I86958956"]}],"countries":["IR"],"is_corresponding":false,"raw_author_name":"Reza Lotfi","raw_affiliation_strings":["Integrated Systems Laboratory, EE Department, Ferdowsi University of Mashhad, Mashhad, Iran"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Integrated Systems Laboratory, EE Department, Ferdowsi University of Mashhad, Mashhad, Iran","institution_ids":["https://openalex.org/I86958956"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.31056472,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"4057","last_page":"4060"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.998199999332428,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9977999925613403,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/domino","display_name":"Domino","score":0.6816266179084778},{"id":"https://openalex.org/keywords/flash-adc","display_name":"Flash ADC","score":0.6619858145713806},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6530201435089111},{"id":"https://openalex.org/keywords/analog-to-digital-converter","display_name":"Analog-to-digital converter","score":0.6399285793304443},{"id":"https://openalex.org/keywords/successive-approximation-adc","display_name":"Successive approximation ADC","score":0.6153375506401062},{"id":"https://openalex.org/keywords/flash","display_name":"Flash (photography)","score":0.542926013469696},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5168174505233765},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5104033350944519},{"id":"https://openalex.org/keywords/domino-logic","display_name":"Domino logic","score":0.5094709992408752},{"id":"https://openalex.org/keywords/effective-number-of-bits","display_name":"Effective number of bits","score":0.43563610315322876},{"id":"https://openalex.org/keywords/converters","display_name":"Converters","score":0.41443219780921936},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.4130285382270813},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.34849920868873596},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.28967636823654175},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.24720162153244019},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.23855265974998474},{"id":"https://openalex.org/keywords/capacitor","display_name":"Capacitor","score":0.192467600107193},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.18717488646507263},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.12153300642967224}],"concepts":[{"id":"https://openalex.org/C2776416436","wikidata":"https://www.wikidata.org/wiki/Q3751781","display_name":"Domino","level":3,"score":0.6816266179084778},{"id":"https://openalex.org/C164862427","wikidata":"https://www.wikidata.org/wiki/Q2744647","display_name":"Flash ADC","level":4,"score":0.6619858145713806},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6530201435089111},{"id":"https://openalex.org/C2777271169","wikidata":"https://www.wikidata.org/wiki/Q190169","display_name":"Analog-to-digital converter","level":3,"score":0.6399285793304443},{"id":"https://openalex.org/C60154766","wikidata":"https://www.wikidata.org/wiki/Q2650458","display_name":"Successive approximation ADC","level":4,"score":0.6153375506401062},{"id":"https://openalex.org/C2777526259","wikidata":"https://www.wikidata.org/wiki/Q221836","display_name":"Flash (photography)","level":2,"score":0.542926013469696},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5168174505233765},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5104033350944519},{"id":"https://openalex.org/C2777555262","wikidata":"https://www.wikidata.org/wiki/Q173391","display_name":"Domino logic","level":5,"score":0.5094709992408752},{"id":"https://openalex.org/C16671190","wikidata":"https://www.wikidata.org/wiki/Q505579","display_name":"Effective number of bits","level":3,"score":0.43563610315322876},{"id":"https://openalex.org/C2778422915","wikidata":"https://www.wikidata.org/wiki/Q10302051","display_name":"Converters","level":3,"score":0.41443219780921936},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.4130285382270813},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.34849920868873596},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.28967636823654175},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.24720162153244019},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.23855265974998474},{"id":"https://openalex.org/C52192207","wikidata":"https://www.wikidata.org/wiki/Q5322","display_name":"Capacitor","level":3,"score":0.192467600107193},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.18717488646507263},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.12153300642967224},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C55493867","wikidata":"https://www.wikidata.org/wiki/Q7094","display_name":"Biochemistry","level":1,"score":0.0},{"id":"https://openalex.org/C161790260","wikidata":"https://www.wikidata.org/wiki/Q82264","display_name":"Catalysis","level":2,"score":0.0},{"id":"https://openalex.org/C185592680","wikidata":"https://www.wikidata.org/wiki/Q2329","display_name":"Chemistry","level":0,"score":0.0},{"id":"https://openalex.org/C162454741","wikidata":"https://www.wikidata.org/wiki/Q173359","display_name":"Logic family","level":4,"score":0.0},{"id":"https://openalex.org/C155745195","wikidata":"https://www.wikidata.org/wiki/Q1164179","display_name":"Comparator","level":3,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas.2010.5537633","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2010.5537633","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of 2010 IEEE International Symposium on Circuits and Systems","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.6499999761581421,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":12,"referenced_works":["https://openalex.org/W2082979872","https://openalex.org/W2096968769","https://openalex.org/W2117921957","https://openalex.org/W2123716779","https://openalex.org/W2133038824","https://openalex.org/W2147081564","https://openalex.org/W2154781501","https://openalex.org/W2156253847","https://openalex.org/W2163914596","https://openalex.org/W3146178383","https://openalex.org/W4244715298","https://openalex.org/W6682815025"],"related_works":["https://openalex.org/W2161345192","https://openalex.org/W2593119273","https://openalex.org/W2759986866","https://openalex.org/W2990348658","https://openalex.org/W2125944154","https://openalex.org/W2104938423","https://openalex.org/W3202980289","https://openalex.org/W2075144748","https://openalex.org/W4386387962","https://openalex.org/W2060158757"],"abstract_inverted_index":{"A":[0],"novel":[1],"analog-to-digital":[2],"converter":[3,87],"(ADC)":[4],"architecture,":[5,8],"named":[6],"domino":[7],"is":[9,50,97],"introduced.":[10],"The":[11,47,86],"proposed":[12,73],"idea":[13,49],"can":[14],"be":[15],"taken":[16],"as":[17],"the":[18,26,58,72,100],"continuous-time":[19],"counterpart":[20],"of":[21,34,95],"SAR":[22],"ADCs,":[23],"and":[24,44],"at":[25,91],"same":[27],"time":[28],"it":[29],"resembles":[30],"a":[31,63,81],"series":[32],"version":[33],"flash":[35,68],"ADCs":[36],"being":[37],"implemented":[38],"with":[39],"much":[40],"less":[41],"circuit":[42],"complexity":[43],"chip":[45],"area.":[46],"basic":[48],"then":[51],"pipelined":[52],"in":[53,62,80],"order":[54],"to":[55,67],"speed":[56],"up":[57],"conversion":[59,64],"process,":[60],"leading":[61],"rate":[65],"comparable":[66],"ADCs.":[69],"Based":[70],"on":[71],"idea,":[74],"an":[75],"8-bit":[76],"ADC":[77],"was":[78],"designed":[79],"0.18":[82],"\u03bcm":[83],"CMOS":[84],"technology.":[85],"dissipates":[88],"21":[89],"mW":[90,94],"300MS/s,":[92],"19":[93],"which":[96],"dissipated":[98],"by":[99],"track-and-hold":[101],"blocks.":[102]},"counts_by_year":[{"year":2020,"cited_by_count":3},{"year":2017,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
