{"id":"https://openalex.org/W2058526671","doi":"https://doi.org/10.1109/iscas.2009.5118445","title":"An asynchronously embedded datapath for performance acceleration and energy efficiency","display_name":"An asynchronously embedded datapath for performance acceleration and energy efficiency","publication_year":2009,"publication_date":"2009-05-01","ids":{"openalex":"https://openalex.org/W2058526671","doi":"https://doi.org/10.1109/iscas.2009.5118445","mag":"2058526671"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2009.5118445","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2009.5118445","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 IEEE International Symposium on Circuits and Systems","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5054222231","display_name":"Bo Marr","orcid":null},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"B. Marr","raw_affiliation_strings":["School of Electrical and Computer Engineering, Georgia Institute of Technology, USA","School of Electrical and Computer Engineering, Georgia Institute of Technology, , USA"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Georgia Institute of Technology, USA","institution_ids":["https://openalex.org/I130701444"]},{"raw_affiliation_string":"School of Electrical and Computer Engineering, Georgia Institute of Technology, , USA","institution_ids":["https://openalex.org/I130701444"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5055345434","display_name":"Brian Degnan","orcid":"https://orcid.org/0000-0002-6567-6998"},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"B. Degnan","raw_affiliation_strings":["School of Electrical and Computer Engineering, Georgia Institute of Technology, USA","School of Electrical and Computer Engineering, Georgia Institute of Technology, , USA"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Georgia Institute of Technology, USA","institution_ids":["https://openalex.org/I130701444"]},{"raw_affiliation_string":"School of Electrical and Computer Engineering, Georgia Institute of Technology, , USA","institution_ids":["https://openalex.org/I130701444"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5105781337","display_name":"P. Hasler","orcid":null},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"P. Hasler","raw_affiliation_strings":["School of Electrical and Computer Engineering, Georgia Institute of Technology, USA","School of Electrical and Computer Engineering, Georgia Institute of Technology, , USA"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Georgia Institute of Technology, USA","institution_ids":["https://openalex.org/I130701444"]},{"raw_affiliation_string":"School of Electrical and Computer Engineering, Georgia Institute of Technology, , USA","institution_ids":["https://openalex.org/I130701444"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5033437141","display_name":"David V. Anderson","orcid":"https://orcid.org/0000-0002-8571-4613"},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"D.V. Anderson","raw_affiliation_strings":["School of Electrical and Computer Engineering, Georgia Institute of Technology, USA","School of Electrical and Computer Engineering, Georgia Institute of Technology, , USA"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Georgia Institute of Technology, USA","institution_ids":["https://openalex.org/I130701444"]},{"raw_affiliation_string":"School of Electrical and Computer Engineering, Georgia Institute of Technology, , USA","institution_ids":["https://openalex.org/I130701444"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5054222231"],"corresponding_institution_ids":["https://openalex.org/I130701444"],"apc_list":null,"apc_paid":null,"fwci":0.5982,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":{"value":0.70930513,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"3046","last_page":"3049"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/datapath","display_name":"Datapath","score":0.9693713188171387},{"id":"https://openalex.org/keywords/asynchronous-communication","display_name":"Asynchronous communication","score":0.7757658958435059},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7478051781654358},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.6477407813072205},{"id":"https://openalex.org/keywords/asynchronous-circuit","display_name":"Asynchronous circuit","score":0.5554072260856628},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4732131361961365},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.4646330177783966},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.45513829588890076},{"id":"https://openalex.org/keywords/efficient-energy-use","display_name":"Efficient energy use","score":0.4521992802619934},{"id":"https://openalex.org/keywords/asynchronous-system","display_name":"Asynchronous system","score":0.4466608762741089},{"id":"https://openalex.org/keywords/register-file","display_name":"Register file","score":0.4454902112483978},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4322337508201599},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.33115482330322266},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.21077677607536316},{"id":"https://openalex.org/keywords/synchronous-circuit","display_name":"Synchronous circuit","score":0.15489423274993896},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1300944685935974},{"id":"https://openalex.org/keywords/clock-signal","display_name":"Clock signal","score":0.12387725710868835},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.12372907996177673},{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.10670414566993713},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.10607209801673889},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.08508872985839844}],"concepts":[{"id":"https://openalex.org/C2781198647","wikidata":"https://www.wikidata.org/wiki/Q1633673","display_name":"Datapath","level":2,"score":0.9693713188171387},{"id":"https://openalex.org/C151319957","wikidata":"https://www.wikidata.org/wiki/Q752739","display_name":"Asynchronous communication","level":2,"score":0.7757658958435059},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7478051781654358},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.6477407813072205},{"id":"https://openalex.org/C87695204","wikidata":"https://www.wikidata.org/wiki/Q629971","display_name":"Asynchronous circuit","level":5,"score":0.5554072260856628},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4732131361961365},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.4646330177783966},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.45513829588890076},{"id":"https://openalex.org/C2742236","wikidata":"https://www.wikidata.org/wiki/Q924713","display_name":"Efficient energy use","level":2,"score":0.4521992802619934},{"id":"https://openalex.org/C7923308","wikidata":"https://www.wikidata.org/wiki/Q4812211","display_name":"Asynchronous system","level":5,"score":0.4466608762741089},{"id":"https://openalex.org/C117280010","wikidata":"https://www.wikidata.org/wiki/Q180944","display_name":"Register file","level":3,"score":0.4454902112483978},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4322337508201599},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.33115482330322266},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.21077677607536316},{"id":"https://openalex.org/C42196554","wikidata":"https://www.wikidata.org/wiki/Q1186179","display_name":"Synchronous circuit","level":4,"score":0.15489423274993896},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1300944685935974},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.12387725710868835},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.12372907996177673},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.10670414566993713},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.10607209801673889},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.08508872985839844},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas.2009.5118445","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2009.5118445","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 IEEE International Symposium on Circuits and Systems","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.8999999761581421}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W136905915","https://openalex.org/W1518236483","https://openalex.org/W1606130300","https://openalex.org/W1633471522","https://openalex.org/W2021330840","https://openalex.org/W2085176118","https://openalex.org/W2151503471","https://openalex.org/W2166243422","https://openalex.org/W2171376159","https://openalex.org/W4243513274","https://openalex.org/W6682367464"],"related_works":["https://openalex.org/W2115178757","https://openalex.org/W2094874787","https://openalex.org/W3013048777","https://openalex.org/W2024145214","https://openalex.org/W4210841712","https://openalex.org/W2138197942","https://openalex.org/W1984298705","https://openalex.org/W4247130854","https://openalex.org/W2127795343","https://openalex.org/W1482079447"],"abstract_inverted_index":{"Motivated":[0],"by":[1,17,30],"the":[2,6,36,113,135],"unwillingness":[3],"to":[4,69,102,154,163],"accept":[5],"worst-case":[7],"timing":[8,31],"constraint":[9],"that":[10,27,43,56,66,97],"synchronous":[11,49,81,107],"logic":[12,62],"imposes,":[13],"and":[14,83,147,158],"additionally":[15],"motivated":[16],"finding":[18],"a":[19,48,85,106,129],"supply":[20],"voltage":[21],"scaling":[22],"scheme":[23,117],"for":[24,89],"datapath":[25,42,90,100,166],"circuits":[26,94,140],"is":[28,44,76,84,118],"unconstrained":[29],"errors":[32],"in":[33,105],"memory":[34],"elements,":[35],"authors":[37,126],"have":[38,127],"built":[39,128],"an":[40],"asynchronous":[41,60,99,115],"embedded":[45,104],"seamlessly":[46],"into":[47],"register":[50],"file.":[51],"This":[52],"paper":[53],"will":[54,144],"show":[55],"not":[57],"only":[58],"does":[59],"arithmetic":[61],"exhibit":[63],"many":[64],"characteristics":[65],"allow":[67,98],"it":[68,75],"be":[70,103,145,155],"inherently":[71],"lower":[72],"power,":[73],"but":[74],"significantly":[77],"faster":[78],"than":[79],"any":[80],"counterpart":[82],"perfect":[86],"candidate":[87],"technology":[88],"acceleration.":[91],"Further,":[92],"novel":[93],"are":[95],"presented":[96],"units":[101],"environment":[108],"with":[109,121],"little":[110],"overhead":[111],"while":[112],"dual-rail":[114],"encoding":[116],"successfully":[119],"converted":[120],"equally":[122],"low":[123],"overhead.":[124],"The":[125,139],"test":[130],"chip":[131,143],"being":[132],"fabricated":[133],"at":[134],"time":[136],"of":[137],"publication.":[138],"on":[141],"this":[142,152],"discussed":[146],"simulation":[148],"results":[149],"given":[150],"showing":[151],"design":[153],"both":[156],"energy":[157],"performance":[159],"efficient":[160],"when":[161],"compared":[162],"other":[164],"known":[165],"designs.":[167]},"counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2016,"cited_by_count":1},{"year":2015,"cited_by_count":1},{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
