{"id":"https://openalex.org/W2114508635","doi":"https://doi.org/10.1109/iscas.2009.5118264","title":"Implementation and prototyping of a complex multi-project system-on-a-chip","display_name":"Implementation and prototyping of a complex multi-project system-on-a-chip","publication_year":2009,"publication_date":"2009-05-01","ids":{"openalex":"https://openalex.org/W2114508635","doi":"https://doi.org/10.1109/iscas.2009.5118264","mag":"2114508635"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2009.5118264","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2009.5118264","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 IEEE International Symposium on Circuits and Systems","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101901556","display_name":"Chun-Ming Huang","orcid":"https://orcid.org/0000-0001-7973-9112"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Chun-Ming Huang","raw_affiliation_strings":["National Chip Implementation Center, Hsinchu, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"National Chip Implementation Center, Hsinchu, Taiwan","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5103047746","display_name":"Chien\u2010Ming Wu","orcid":"https://orcid.org/0000-0001-9295-7181"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Chien-Ming Wu","raw_affiliation_strings":["National Chip Implementation Center, Hsinchu, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"National Chip Implementation Center, Hsinchu, Taiwan","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5039735116","display_name":"Chih-Chyau Yang","orcid":"https://orcid.org/0000-0001-6508-8160"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Chih-Chyau Yang","raw_affiliation_strings":["National Chip Implementation Center, Hsinchu, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"National Chip Implementation Center, Hsinchu, Taiwan","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5086700682","display_name":"Wei-De Chien","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Wei-De Chien","raw_affiliation_strings":["National Chip Implementation Center, Hsinchu, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"National Chip Implementation Center, Hsinchu, Taiwan","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5025762419","display_name":"Shih\u2010Lun Chen","orcid":"https://orcid.org/0000-0002-4079-9350"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Shih-Lun Chen","raw_affiliation_strings":["National Chip Implementation Center, Hsinchu, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"National Chip Implementation Center, Hsinchu, Taiwan","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5080379943","display_name":"Chi\u2010Shi Chen","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Chi-Shi Chen","raw_affiliation_strings":["National Chip Implementation Center, Hsinchu, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"National Chip Implementation Center, Hsinchu, Taiwan","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5004461776","display_name":"Jiann-Jenn Wang","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Jiann-Jenn Wang","raw_affiliation_strings":["National Chip Implementation Center, Hsinchu, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"National Chip Implementation Center, Hsinchu, Taiwan","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5111539337","display_name":"Chin\u2010Long Wey","orcid":null},"institutions":[{"id":"https://openalex.org/I22265921","display_name":"National Central University","ror":"https://ror.org/00944ve71","country_code":"TW","type":"education","lineage":["https://openalex.org/I22265921"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Chin-Long Wey","raw_affiliation_strings":["Department of Electrical Engineering, National Central University, Jhong Li, Taiwan","National Chip Implementation Center, Hsinchu, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, National Central University, Jhong Li, Taiwan","institution_ids":["https://openalex.org/I22265921"]},{"raw_affiliation_string":"National Chip Implementation Center, Hsinchu, Taiwan","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":8,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.5362,"has_fulltext":false,"cited_by_count":7,"citation_normalized_percentile":{"value":0.6833838,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"2321","last_page":"2324"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9973000288009644,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.6531865000724792},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5716783404350281},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5660487413406372},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.5222245454788208},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.49154767394065857},{"id":"https://openalex.org/keywords/rapid-prototyping","display_name":"Rapid prototyping","score":0.46276918053627014},{"id":"https://openalex.org/keywords/integrated-circuit-design","display_name":"Integrated circuit design","score":0.43077701330184937},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.419287770986557},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.417267769575119},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.268624871969223},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.266687273979187},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.07927221059799194}],"concepts":[{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.6531865000724792},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5716783404350281},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5660487413406372},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.5222245454788208},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.49154767394065857},{"id":"https://openalex.org/C2780395129","wikidata":"https://www.wikidata.org/wiki/Q1128971","display_name":"Rapid prototyping","level":2,"score":0.46276918053627014},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.43077701330184937},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.419287770986557},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.417267769575119},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.268624871969223},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.266687273979187},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.07927221059799194},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas.2009.5118264","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2009.5118264","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 IEEE International Symposium on Circuits and Systems","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","score":0.6299999952316284,"id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":4,"referenced_works":["https://openalex.org/W1529130237","https://openalex.org/W2073906129","https://openalex.org/W2104315811","https://openalex.org/W2144641451"],"related_works":["https://openalex.org/W2065289416","https://openalex.org/W2017236304","https://openalex.org/W2136854845","https://openalex.org/W2038859986","https://openalex.org/W2104315811","https://openalex.org/W2142217172","https://openalex.org/W4230312832","https://openalex.org/W1982273910","https://openalex.org/W1929041301","https://openalex.org/W2032882110"],"abstract_inverted_index":{"A":[0,11,137],"silicon":[1,27,65,111,124],"prototyping":[2,28,140],"methodology":[3],"is":[4,67,144],"presented":[5],"for":[6,16,151],"Multi-Project":[7],"System-on-a-Chip":[8],"(MP-SoC)":[9],"implementation.":[10],"multi-projects":[12],"platform":[13,134,150],"was":[14,53],"created":[15,146],"integrating":[17],"heterogeneous":[18],"SoC":[19,57,139],"projects":[20,32,58,98],"into":[21],"a":[22,39,50,126,148],"single":[23],"chip.":[24],"The":[25,63,162],"total":[26,64,87],"cost":[29],"of":[30,46,155],"these":[31,97],"can":[33],"be":[34],"greatly":[35],"reduced":[36,113],"by":[37,95,114],"sharing":[38,59],"common":[40,61],"platform.":[41,62,117],"To":[42],"demonstrate":[43],"the":[44,47,60,75,86,100,115,153],"effectiveness":[45],"proposed":[48],"methodology,":[49],"MP-SoC":[51,116,122,156],"chip":[52,88,158],"implemented":[54],"with":[55,85],"eleven":[56],"area":[66,89],"about":[68],"37.97":[69],"mm":[70,91,107],"<sup":[71,92,108],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[72,93,109],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">2</sup>":[73,94,110],"in":[74],"TSMC":[76],"0.13":[77],"um":[78],"CMOS":[79],"generic":[80],"logic":[81],"process":[82],"technology.":[83],"Compared":[84],"129.39":[90],"implementing":[96],"separately,":[99],"results":[101],"show":[102],"that":[103],"there":[104],"are":[105],"91.42":[106],"areas":[112],"In":[118],"order":[119],"to":[120],"verify":[121],"through":[123],"prototyping,":[125],"system":[127,164],"modeling":[128],"and":[129,170],"hardware/":[130],"software":[131],"co-design":[132],"virtual":[133],"were":[135],"implemented.":[136],"configurable":[138],"system,":[141],"namely":[142],"CONCORD,":[143],"also":[145],"as":[147],"verification":[149],"emulating":[152],"hardware":[154],"before":[157],"being":[159],"taped":[160],"out.":[161],"CONCORD":[163],"provides":[165],"higher":[166],"connection":[167],"flexibility,":[168],"modularization,":[169],"architecture":[171],"consistence":[172],"than":[173],"conventional":[174],"FPGA":[175],"systems.":[176]},"counts_by_year":[{"year":2019,"cited_by_count":1},{"year":2016,"cited_by_count":3},{"year":2013,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}