{"id":"https://openalex.org/W2069853100","doi":"https://doi.org/10.1109/iscas.2009.5118262","title":"Designing variation-tolerance in mixed-signal components of a system-on-chip","display_name":"Designing variation-tolerance in mixed-signal components of a system-on-chip","publication_year":2009,"publication_date":"2009-05-01","ids":{"openalex":"https://openalex.org/W2069853100","doi":"https://doi.org/10.1109/iscas.2009.5118262","mag":"2069853100"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2009.5118262","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2009.5118262","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 IEEE International Symposium on Circuits and Systems","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5065273450","display_name":"Wei Jiang","orcid":"https://orcid.org/0000-0001-5456-6286"},"institutions":[{"id":"https://openalex.org/I82497590","display_name":"Auburn University","ror":"https://ror.org/02v80fc35","country_code":"US","type":"education","lineage":["https://openalex.org/I82497590"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Wei Jiang","raw_affiliation_strings":["Electrical and Computer Engineering, Aubum University, Auburn, AL, USA","Electrical and Computer Engineering, Auburn University, AL 36849, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Electrical and Computer Engineering, Aubum University, Auburn, AL, USA","institution_ids":["https://openalex.org/I82497590"]},{"raw_affiliation_string":"Electrical and Computer Engineering, Auburn University, AL 36849, USA","institution_ids":["https://openalex.org/I82497590"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5084081268","display_name":"Vishwani D. Agrawal","orcid":"https://orcid.org/0000-0002-7121-5979"},"institutions":[{"id":"https://openalex.org/I82497590","display_name":"Auburn University","ror":"https://ror.org/02v80fc35","country_code":"US","type":"education","lineage":["https://openalex.org/I82497590"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Vishwani D. Agrawal","raw_affiliation_strings":["Electrical and Computer Engineering, Aubum University, Auburn, AL, USA","Electrical and Computer Engineering, Auburn University, AL 36849, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Electrical and Computer Engineering, Aubum University, Auburn, AL, USA","institution_ids":["https://openalex.org/I82497590"]},{"raw_affiliation_string":"Electrical and Computer Engineering, Auburn University, AL 36849, USA","institution_ids":["https://openalex.org/I82497590"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I82497590"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":7,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"2313","last_page":"2316"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9976000189781189,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12564","display_name":"Sensor Technology and Measurement Systems","score":0.9975000023841858,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/mixed-signal-integrated-circuit","display_name":"Mixed-signal integrated circuit","score":0.653292179107666},{"id":"https://openalex.org/keywords/dither","display_name":"Dither","score":0.6284223198890686},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5961992144584656},{"id":"https://openalex.org/keywords/converters","display_name":"Converters","score":0.5663338303565979},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5453405380249023},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.538520872592926},{"id":"https://openalex.org/keywords/linearity","display_name":"Linearity","score":0.5194127559661865},{"id":"https://openalex.org/keywords/digital-signal","display_name":"Digital signal","score":0.4765630066394806},{"id":"https://openalex.org/keywords/signal","display_name":"SIGNAL (programming language)","score":0.4523974657058716},{"id":"https://openalex.org/keywords/process-variation","display_name":"Process variation","score":0.4375634491443634},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.434908926486969},{"id":"https://openalex.org/keywords/digital-signal-processor","display_name":"Digital signal processor","score":0.42187047004699707},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.28882819414138794},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.26541292667388916},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.18913379311561584},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.16583940386772156},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.11033034324645996},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.10592341423034668}],"concepts":[{"id":"https://openalex.org/C62907940","wikidata":"https://www.wikidata.org/wiki/Q1541329","display_name":"Mixed-signal integrated circuit","level":3,"score":0.653292179107666},{"id":"https://openalex.org/C70451592","wikidata":"https://www.wikidata.org/wiki/Q376493","display_name":"Dither","level":3,"score":0.6284223198890686},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5961992144584656},{"id":"https://openalex.org/C2778422915","wikidata":"https://www.wikidata.org/wiki/Q10302051","display_name":"Converters","level":3,"score":0.5663338303565979},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5453405380249023},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.538520872592926},{"id":"https://openalex.org/C77170095","wikidata":"https://www.wikidata.org/wiki/Q1753188","display_name":"Linearity","level":2,"score":0.5194127559661865},{"id":"https://openalex.org/C52773712","wikidata":"https://www.wikidata.org/wiki/Q175022","display_name":"Digital signal","level":3,"score":0.4765630066394806},{"id":"https://openalex.org/C2779843651","wikidata":"https://www.wikidata.org/wiki/Q7390335","display_name":"SIGNAL (programming language)","level":2,"score":0.4523974657058716},{"id":"https://openalex.org/C93389723","wikidata":"https://www.wikidata.org/wiki/Q7247313","display_name":"Process variation","level":3,"score":0.4375634491443634},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.434908926486969},{"id":"https://openalex.org/C161611012","wikidata":"https://www.wikidata.org/wiki/Q106370","display_name":"Digital signal processor","level":3,"score":0.42187047004699707},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.28882819414138794},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.26541292667388916},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.18913379311561584},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.16583940386772156},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.11033034324645996},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.10592341423034668},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C9083635","wikidata":"https://www.wikidata.org/wiki/Q2133535","display_name":"Noise shaping","level":2,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1109/iscas.2009.5118262","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2009.5118262","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 IEEE International Symposium on Circuits and Systems","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.146.5328","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.146.5328","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.eng.auburn.edu/~vagrawal/TALKS/ISCAS09/iscas09_weijiang.pdf","raw_type":"text"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.159.7604","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.159.7604","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.eng.auburn.edu/~vagrawal/TALKS/ISCAS09/ISCAS09_Jiang.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8899999856948853,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":8,"referenced_works":["https://openalex.org/W53227076","https://openalex.org/W986743132","https://openalex.org/W1123162562","https://openalex.org/W1595368737","https://openalex.org/W2055862872","https://openalex.org/W2146116573","https://openalex.org/W6625639566","https://openalex.org/W6664515347"],"related_works":["https://openalex.org/W2750861986","https://openalex.org/W2023576755","https://openalex.org/W1536033640","https://openalex.org/W2120325782","https://openalex.org/W2366086026","https://openalex.org/W2127185138","https://openalex.org/W2129509764","https://openalex.org/W2378525432","https://openalex.org/W2995548803","https://openalex.org/W2069853100"],"abstract_inverted_index":{"Nanoscale":[0],"system-on-chip":[1],"(SoC)":[2],"devices":[3,25,146],"offer":[4],"potential":[5],"for":[6,42,86,93],"higher":[7],"performance":[8],"and":[9,18,57,61,88,104,109],"reduced":[10],"power":[11],"consumption":[12],"at":[13],"lower":[14],"cost.":[15],"However":[16],"yield":[17],"reliability":[19],"of":[20,55,59,95,130],"mixed-signal":[21,47,145],"components":[22],"in":[23,45,127],"such":[24],"become":[26],"serious":[27],"issues":[28],"due":[29],"to":[30,72,117,135,143],"process":[31],"variability.":[32],"In":[33],"this":[34],"paper,":[35],"we":[36],"discuss":[37],"a":[38,51,66,82,89,110,125],"novel":[39],"variation-tolerant":[40],"technique":[41,138],"non-linearity":[43],"errors":[44,129],"self-correctable":[46],"components.":[48],"We":[49],"propose":[50],"completely":[52],"digital":[53,67,148],"method":[54],"test":[56,100],"correction":[58,94],"digital-to-analog":[60],"analog-to-digital":[62],"converters":[63,131],"(DAC/ADC)":[64],"using":[65],"signal":[68],"processor":[69],"(DSP)":[70],"assumed":[71],"be":[73,141],"available":[74],"on":[75],"the":[76,119],"SoC.":[77],"The":[78,97],"added":[79],"hardware":[80],"includes":[81],"first-order":[83],"sigma-delta":[84],"ADC":[85],"measurement":[87],"low-resolution":[90],"dithering":[91],"DAC":[92],"output.":[96],"DSP":[98],"handles":[99],"pattern":[101],"generation":[102],"(TPG)":[103],"output":[105],"response":[106],"analysis":[107],"(ORA)":[108],"third-order":[111],"polynomial":[112],"fitting":[113],"algorithm":[114],"is":[115],"employed":[116],"characterize":[118],"nonlinearity":[120,128],"error.":[121],"Simulation":[122],"results":[123],"demonstrate":[124],"reduction":[126],"from":[132],"plusmn1.5LSB":[133],"down":[134],"plusmn0.5LSB.":[136],"Our":[137],"can":[139],"also":[140],"applied":[142],"other":[144],"with":[147],"control.":[149]},"counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2014,"cited_by_count":1},{"year":2012,"cited_by_count":2}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}