{"id":"https://openalex.org/W2117444827","doi":"https://doi.org/10.1109/iscas.2009.5118161","title":"MIPA4k: A 64×64 cell mixed-mode image processor array","display_name":"MIPA4k: A 64×64 cell mixed-mode image processor array","publication_year":2009,"publication_date":"2009-05-01","ids":{"openalex":"https://openalex.org/W2117444827","doi":"https://doi.org/10.1109/iscas.2009.5118161","mag":"2117444827"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2009.5118161","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2009.5118161","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 IEEE International Symposium on Circuits and Systems","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5088530873","display_name":"Jonne Poikonen","orcid":"https://orcid.org/0000-0002-5531-2453"},"institutions":[{"id":"https://openalex.org/I155660961","display_name":"University of Turku","ror":"https://ror.org/05vghhr25","country_code":"FI","type":"education","lineage":["https://openalex.org/I155660961"]}],"countries":["FI"],"is_corresponding":false,"raw_author_name":"Jonne Poikonen","raw_affiliation_strings":["Department of Information Technology, University of Turku, Finland","Department of Information Technology, University of Turku, FIN-20014, Finland"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Information Technology, University of Turku, Finland","institution_ids":["https://openalex.org/I155660961"]},{"raw_affiliation_string":"Department of Information Technology, University of Turku, FIN-20014, Finland","institution_ids":["https://openalex.org/I155660961"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5052855358","display_name":"Mika Laiho","orcid":"https://orcid.org/0000-0002-3794-0800"},"institutions":[{"id":"https://openalex.org/I155660961","display_name":"University of Turku","ror":"https://ror.org/05vghhr25","country_code":"FI","type":"education","lineage":["https://openalex.org/I155660961"]}],"countries":["FI"],"is_corresponding":false,"raw_author_name":"Mika Laiho","raw_affiliation_strings":["Department of Information Technology, University of Turku, Finland","Department of Information Technology, University of Turku, FIN-20014, Finland"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Information Technology, University of Turku, Finland","institution_ids":["https://openalex.org/I155660961"]},{"raw_affiliation_string":"Department of Information Technology, University of Turku, FIN-20014, Finland","institution_ids":["https://openalex.org/I155660961"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5038944203","display_name":"A. Paasio","orcid":"https://orcid.org/0000-0003-2543-7391"},"institutions":[{"id":"https://openalex.org/I155660961","display_name":"University of Turku","ror":"https://ror.org/05vghhr25","country_code":"FI","type":"education","lineage":["https://openalex.org/I155660961"]}],"countries":["FI"],"is_corresponding":false,"raw_author_name":"Ari Paasio","raw_affiliation_strings":["Department of Information Technology, University of Turku, Finland","Department of Information Technology, University of Turku, FIN-20014, Finland"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Information Technology, University of Turku, Finland","institution_ids":["https://openalex.org/I155660961"]},{"raw_affiliation_string":"Department of Information Technology, University of Turku, FIN-20014, Finland","institution_ids":["https://openalex.org/I155660961"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":8.5449,"has_fulltext":false,"cited_by_count":46,"citation_normalized_percentile":{"value":0.9804507,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":"51","issue":null,"first_page":"1927","last_page":"1930"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9976999759674072,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11347","display_name":"Neural Networks Stability and Synchronization","score":0.993399977684021,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.6850878000259399},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5801188349723816},{"id":"https://openalex.org/keywords/grayscale","display_name":"Grayscale","score":0.5791586637496948},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.577212393283844},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.5659328103065491},{"id":"https://openalex.org/keywords/mode","display_name":"Mode (computer interface)","score":0.5018718242645264},{"id":"https://openalex.org/keywords/image-processing","display_name":"Image processing","score":0.4323786497116089},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.4304152727127075},{"id":"https://openalex.org/keywords/image","display_name":"Image (mathematics)","score":0.4128292500972748},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.2857871651649475},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.20776596665382385},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.17585989832878113},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.17394143342971802},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.10390955209732056}],"concepts":[{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.6850878000259399},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5801188349723816},{"id":"https://openalex.org/C78201319","wikidata":"https://www.wikidata.org/wiki/Q685727","display_name":"Grayscale","level":3,"score":0.5791586637496948},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.577212393283844},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.5659328103065491},{"id":"https://openalex.org/C48677424","wikidata":"https://www.wikidata.org/wiki/Q6888088","display_name":"Mode (computer interface)","level":2,"score":0.5018718242645264},{"id":"https://openalex.org/C9417928","wikidata":"https://www.wikidata.org/wiki/Q1070689","display_name":"Image processing","level":3,"score":0.4323786497116089},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.4304152727127075},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.4128292500972748},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.2857871651649475},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.20776596665382385},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.17585989832878113},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.17394143342971802},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.10390955209732056},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas.2009.5118161","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2009.5118161","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 IEEE International Symposium on Circuits and Systems","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":14,"referenced_works":["https://openalex.org/W1552895118","https://openalex.org/W1570659056","https://openalex.org/W2097988027","https://openalex.org/W2099500453","https://openalex.org/W2103923655","https://openalex.org/W2114650652","https://openalex.org/W2117148079","https://openalex.org/W2141378314","https://openalex.org/W2147137844","https://openalex.org/W2149574914","https://openalex.org/W2153161369","https://openalex.org/W2160121923","https://openalex.org/W2611660823","https://openalex.org/W6737289691"],"related_works":["https://openalex.org/W115686965","https://openalex.org/W2768918307","https://openalex.org/W2110031805","https://openalex.org/W2040020606","https://openalex.org/W4362659915","https://openalex.org/W2113071088","https://openalex.org/W3014521742","https://openalex.org/W2321543601","https://openalex.org/W1990016983","https://openalex.org/W2098218272"],"abstract_inverted_index":{"This":[0,34],"paper":[1,35],"presents":[2,36],"the":[3,37,40,44,60],"MIPA4k,":[4],"a":[5,54,70],"64times64":[6],"cell":[7,15,42,71],"mixed-mode":[8],"image":[9,18],"processor":[10,14,41,49],"array":[11],"chip.":[12],"The":[13,48],"includes":[16],"an":[17],"sensor,":[19],"A/D/A":[20],"conversion,":[21],"embedded":[22],"digital":[23],"and":[24,27,30,43,59],"analog":[25],"memories":[26],"hardware-optimized":[28],"grayscale":[29],"binary":[31],"processing":[32],"cores.":[33],"architecture":[38],"of":[39,73],"different":[45],"functional":[46],"hardware.":[47],"has":[50],"been":[51],"manufactured":[52],"in":[53],"0.13":[55],"micron":[56],"CMOS":[57],"technology":[58],"chip":[61],"size":[62],"is":[63],"5.1times4.5":[64],"mm":[65],"2":[68,78],"with":[69],"area":[72],"72times61":[74],"mum":[75],".":[79]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":2},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2018,"cited_by_count":3},{"year":2017,"cited_by_count":1},{"year":2015,"cited_by_count":2},{"year":2014,"cited_by_count":3},{"year":2013,"cited_by_count":4},{"year":2012,"cited_by_count":7}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}