{"id":"https://openalex.org/W2163543978","doi":"https://doi.org/10.1109/iscas.2009.5117928","title":"Exploring compiler optimizations for enhancing power gating","display_name":"Exploring compiler optimizations for enhancing power gating","publication_year":2009,"publication_date":"2009-05-01","ids":{"openalex":"https://openalex.org/W2163543978","doi":"https://doi.org/10.1109/iscas.2009.5117928","mag":"2163543978"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2009.5117928","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2009.5117928","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 IEEE International Symposium on Circuits and Systems","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5002347058","display_name":"Soumyaroop Roy","orcid":null},"institutions":[{"id":"https://openalex.org/I2613432","display_name":"University of South Florida","ror":"https://ror.org/032db5x82","country_code":"US","type":"education","lineage":["https://openalex.org/I2613432"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Soumyaroop Roy","raw_affiliation_strings":["Department of Computer Science and Engineering, University of South Florida, Tampa, FL, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, University of South Florida, Tampa, FL, USA","institution_ids":["https://openalex.org/I2613432"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5027665366","display_name":"N. Ranganathan","orcid":null},"institutions":[{"id":"https://openalex.org/I2613432","display_name":"University of South Florida","ror":"https://ror.org/032db5x82","country_code":"US","type":"education","lineage":["https://openalex.org/I2613432"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Nagarajan Ranganathan","raw_affiliation_strings":["Department of Computer Science and Engineering, University of South Florida, Tampa, FL, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, University of South Florida, Tampa, FL, USA","institution_ids":["https://openalex.org/I2613432"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5016167446","display_name":"Srinivas Katkoori","orcid":"https://orcid.org/0000-0002-7589-5836"},"institutions":[{"id":"https://openalex.org/I2613432","display_name":"University of South Florida","ror":"https://ror.org/032db5x82","country_code":"US","type":"education","lineage":["https://openalex.org/I2613432"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Srinivas Katkoori","raw_affiliation_strings":["Department of Computer Science and Engineering, University of South Florida, Tampa, FL, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, University of South Florida, Tampa, FL, USA","institution_ids":["https://openalex.org/I2613432"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I2613432"],"apc_list":null,"apc_paid":null,"fwci":0.3658,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.5683425,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":95},"biblio":{"volume":null,"issue":null,"first_page":"1004","last_page":"1007"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9970999956130981,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8653426170349121},{"id":"https://openalex.org/keywords/power-gating","display_name":"Power gating","score":0.8159598708152771},{"id":"https://openalex.org/keywords/compiler","display_name":"Compiler","score":0.7629057168960571},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5878194570541382},{"id":"https://openalex.org/keywords/optimizing-compiler","display_name":"Optimizing compiler","score":0.5171205997467041},{"id":"https://openalex.org/keywords/standby-power","display_name":"Standby power","score":0.4637053608894348},{"id":"https://openalex.org/keywords/microarchitecture","display_name":"Microarchitecture","score":0.4231318533420563},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.41752681136131287},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.40588951110839844},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.31401973962783813},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.17210987210273743},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.11011403799057007}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8653426170349121},{"id":"https://openalex.org/C2780700455","wikidata":"https://www.wikidata.org/wiki/Q7236515","display_name":"Power gating","level":4,"score":0.8159598708152771},{"id":"https://openalex.org/C169590947","wikidata":"https://www.wikidata.org/wiki/Q47506","display_name":"Compiler","level":2,"score":0.7629057168960571},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5878194570541382},{"id":"https://openalex.org/C190902152","wikidata":"https://www.wikidata.org/wiki/Q1325106","display_name":"Optimizing compiler","level":3,"score":0.5171205997467041},{"id":"https://openalex.org/C7140552","wikidata":"https://www.wikidata.org/wiki/Q1366402","display_name":"Standby power","level":3,"score":0.4637053608894348},{"id":"https://openalex.org/C107598950","wikidata":"https://www.wikidata.org/wiki/Q259864","display_name":"Microarchitecture","level":2,"score":0.4231318533420563},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.41752681136131287},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.40588951110839844},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.31401973962783813},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.17210987210273743},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.11011403799057007},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas.2009.5117928","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2009.5117928","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 IEEE International Symposium on Circuits and Systems","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":23,"referenced_works":["https://openalex.org/W205844127","https://openalex.org/W1497081062","https://openalex.org/W1527024979","https://openalex.org/W1686420892","https://openalex.org/W1986644367","https://openalex.org/W2032094184","https://openalex.org/W2058360616","https://openalex.org/W2069996154","https://openalex.org/W2100963544","https://openalex.org/W2102890180","https://openalex.org/W2117285153","https://openalex.org/W2138406631","https://openalex.org/W2141063168","https://openalex.org/W2156348954","https://openalex.org/W2163064833","https://openalex.org/W2164354609","https://openalex.org/W2535517098","https://openalex.org/W4248510978","https://openalex.org/W4249006057","https://openalex.org/W4285719527","https://openalex.org/W6610805797","https://openalex.org/W6629750690","https://openalex.org/W6637151178"],"related_works":["https://openalex.org/W2075172982","https://openalex.org/W3013845316","https://openalex.org/W2783501501","https://openalex.org/W2001738463","https://openalex.org/W2282162811","https://openalex.org/W2112183879","https://openalex.org/W3140192626","https://openalex.org/W2185135835","https://openalex.org/W2083171629","https://openalex.org/W2532126347"],"abstract_inverted_index":{"Power":[0],"gating":[1,33,64,116,180,204],"is":[2,57,182],"a":[3,12,92,141,231],"circuit":[4,13],"level":[5],"technique":[6],"for":[7,79,215,255,262,268,288,301,308,314],"reducing":[8],"standby":[9],"leakage":[10,283],"in":[11,19,91,137,151,191,247,284],"block":[14],"by":[15,99,107,184],"cutting":[16],"off":[17],"paths":[18],"it":[20],"between":[21],"the":[22,25,49,62,70,74,88,96,100,103,108,114,119,133,138,145,160,186,189,192,199,212,221,244,248,274,279,285,289,293,315],"supply":[23],"and":[24,42,173,210,227,237,265,304],"ground.":[26],"A":[27],"processor":[28,120,154,200,249],"architecture":[29,52,201],"that":[30,40,61,76,131,243,313],"supports":[31],"power":[32,63,115,179,203,226,253],"of":[34,48,82,118,140,178,188,233,258],"its":[35,259],"resources":[36,45,75],"may":[37],"provide":[38],"instructions":[39,65,181],"activate":[41],"deactivate":[43,73,148],"those":[44],"as":[46],"part":[47],"instruction":[50],"set":[51,232],"level.":[53],"Adequate":[54],"compiler":[55,109,129,216],"support":[56,205],"then":[58],"required":[59],"so":[60],"can":[66,251,296],"be":[67,252,297],"inserted":[68],"into":[69],"code":[71,97,104,161,168,290],"to":[72,143,147,224,282],"remain":[77],"idle":[78,260],"long":[80],"periods":[81],"time":[83],"during":[84],"program":[85,93],"execution.":[86],"However,":[87],"resource":[89],"usage":[90,136],"depends":[94],"on":[95,113,159],"generated":[98],"compiler.":[101],"Thus,":[102],"transformations":[105],"performed":[106,158,183,295],"has":[110],"an":[111,152,207],"influence":[112],"opportunities":[117,146],"resources.":[121],"In":[122],"this":[123],"work,":[124],"we":[125,219],"explore":[126],"target":[127],"independent":[128],"optimizations":[130,157,275,294],"modify":[132],"functional":[134,149,286],"unit":[135],"loops":[139],"procedure":[142],"enhance":[144],"units":[150,190,287],"embedded":[153],"architecture.":[155],"The":[156],"are":[162,276],"sparse":[163],"conditional":[164],"constant":[165],"propagation,":[166],"lazy":[167],"motion,":[169],"weak":[170],"strength":[171,175],"reduction,":[172],"operator":[174],"reduction.":[176],"Insertion":[177],"inspecting":[185],"idleness":[187],"regions":[193],"enclosed":[194],"within":[195],"loops.":[196],"We":[197],"model":[198],"with":[202,230,291],"around":[206],"ARM":[208],"core":[209,250],"use":[211,220],"SUIF":[213],"framework":[214],"support.":[217],"Finally,":[218],"Simplescalar-ARM":[222],"distribution":[223],"perform":[225],"performance":[228],"evaluation":[229],"benchmarks":[234],"from":[235],"MiBench":[236],"MediaBench":[238],"suites.":[239],"Experimental":[240],"results":[241],"indicate":[242],"integer":[245,263,302],"multiplier":[246],"gated":[254],"upto":[256,266,298,305],"99%":[257],"cycles,":[261],"benchmarks,":[264,271,303,311],"93%,":[267],"floating":[269,309],"point":[270,310],"when":[272],"all":[273,292],"performed.":[277],"Moreover,":[278],"energy":[280],"due":[281],"51%":[299],"lower,":[300,307],"21%":[306],"than":[312],"unoptimized":[316],"code.":[317]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":1},{"year":2013,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}