{"id":"https://openalex.org/W2097306323","doi":"https://doi.org/10.1109/iscas.2009.5117732","title":"Low-power and high-SFDR direct digital frequency synthesizer based on hybrid CORDIC algorithm","display_name":"Low-power and high-SFDR direct digital frequency synthesizer based on hybrid CORDIC algorithm","publication_year":2009,"publication_date":"2009-05-01","ids":{"openalex":"https://openalex.org/W2097306323","doi":"https://doi.org/10.1109/iscas.2009.5117732","mag":"2097306323"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2009.5117732","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2009.5117732","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 IEEE International Symposium on Circuits and Systems","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5102971583","display_name":"Tze\u2010Yun Sung","orcid":"https://orcid.org/0000-0003-2063-3430"},"institutions":[{"id":"https://openalex.org/I59460038","display_name":"Chung Hua University","ror":"https://ror.org/01yzz0f51","country_code":"TW","type":"education","lineage":["https://openalex.org/I59460038"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Tze-Yun Sung","raw_affiliation_strings":["Department of Microelectronics Engineering, Chung Hua University, Hsinchu, Taiwan","Department of Microelectronics Engineering, Chung Hua University, Hsinchu City, Taiwan 30012, R.O.C"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Microelectronics Engineering, Chung Hua University, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I59460038"]},{"raw_affiliation_string":"Department of Microelectronics Engineering, Chung Hua University, Hsinchu City, Taiwan 30012, R.O.C","institution_ids":["https://openalex.org/I59460038"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5021021354","display_name":"Lyu-Ting Ko","orcid":null},"institutions":[{"id":"https://openalex.org/I59460038","display_name":"Chung Hua University","ror":"https://ror.org/01yzz0f51","country_code":"TW","type":"education","lineage":["https://openalex.org/I59460038"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Lyu-Ting Ko","raw_affiliation_strings":["Department of Microelectronics Engineering, Chung Hua University, Hsinchu, Taiwan","Department of Microelectronics Engineering, Chung Hua University, Hsinchu City, Taiwan 30012, R.O.C"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Microelectronics Engineering, Chung Hua University, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I59460038"]},{"raw_affiliation_string":"Department of Microelectronics Engineering, Chung Hua University, Hsinchu City, Taiwan 30012, R.O.C","institution_ids":["https://openalex.org/I59460038"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5067319601","display_name":"Hsi\u2010Chin Hsin","orcid":"https://orcid.org/0000-0003-0960-2633"},"institutions":[{"id":"https://openalex.org/I125934054","display_name":"National United University","ror":"https://ror.org/04twccc71","country_code":"TW","type":"education","lineage":["https://openalex.org/I125934054"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Hsi-Chin Hsin","raw_affiliation_strings":["Department of Computer Science and Information Engineering, National United University, Miaoli, Taiwan","Dept. of Computer Science and Information Engineering, National United University, Miaoli, Taiwan 36003, R.O.C"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Information Engineering, National United University, Miaoli, Taiwan","institution_ids":["https://openalex.org/I125934054"]},{"raw_affiliation_string":"Dept. of Computer Science and Information Engineering, National United University, Miaoli, Taiwan 36003, R.O.C","institution_ids":["https://openalex.org/I125934054"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":15,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"249","last_page":"252"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11697","display_name":"Numerical Methods and Algorithms","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11697","display_name":"Numerical Methods and Algorithms","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.9918000102043152,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12300","display_name":"Advanced Electrical Measurement Techniques","score":0.9904999732971191,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/cordic","display_name":"CORDIC","score":0.8856865167617798},{"id":"https://openalex.org/keywords/spurious-free-dynamic-range","display_name":"Spurious-free dynamic range","score":0.8593542575836182},{"id":"https://openalex.org/keywords/direct-digital-synthesizer","display_name":"Direct digital synthesizer","score":0.7050654292106628},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.65535968542099},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.5015487670898438},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.38795071840286255},{"id":"https://openalex.org/keywords/frequency-synthesizer","display_name":"Frequency synthesizer","score":0.3853019177913666},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.21184849739074707},{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.18633925914764404},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.14535677433013916},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.13288742303848267},{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.1123332679271698}],"concepts":[{"id":"https://openalex.org/C58870171","wikidata":"https://www.wikidata.org/wiki/Q116076","display_name":"CORDIC","level":3,"score":0.8856865167617798},{"id":"https://openalex.org/C119293636","wikidata":"https://www.wikidata.org/wiki/Q657480","display_name":"Spurious-free dynamic range","level":3,"score":0.8593542575836182},{"id":"https://openalex.org/C166089067","wikidata":"https://www.wikidata.org/wiki/Q1227465","display_name":"Direct digital synthesizer","level":5,"score":0.7050654292106628},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.65535968542099},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.5015487670898438},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.38795071840286255},{"id":"https://openalex.org/C182099602","wikidata":"https://www.wikidata.org/wiki/Q2660678","display_name":"Frequency synthesizer","level":4,"score":0.3853019177913666},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.21184849739074707},{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.18633925914764404},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.14535677433013916},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.13288742303848267},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.1123332679271698},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C31972630","wikidata":"https://www.wikidata.org/wiki/Q844240","display_name":"Computer vision","level":1,"score":0.0},{"id":"https://openalex.org/C87133666","wikidata":"https://www.wikidata.org/wiki/Q1161699","display_name":"Dynamic range","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas.2009.5117732","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2009.5117732","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 IEEE International Symposium on Circuits and Systems","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.8299999833106995}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":12,"referenced_works":["https://openalex.org/W2047995285","https://openalex.org/W2058317693","https://openalex.org/W2088372221","https://openalex.org/W2107419754","https://openalex.org/W2111698733","https://openalex.org/W2126830427","https://openalex.org/W2127123597","https://openalex.org/W2127588446","https://openalex.org/W2130515175","https://openalex.org/W2139581437","https://openalex.org/W2140630008","https://openalex.org/W2141270597"],"related_works":["https://openalex.org/W2885544474","https://openalex.org/W2387479822","https://openalex.org/W2166555237","https://openalex.org/W2161572852","https://openalex.org/W2622028395","https://openalex.org/W4386197759","https://openalex.org/W2389258116","https://openalex.org/W2393010087","https://openalex.org/W2015962950","https://openalex.org/W3035420365"],"abstract_inverted_index":{"This":[0],"paper":[1],"describes":[2],"the":[3,33],"architecture":[4,34],"and":[5,48,64,82,116],"VLSI":[6],"(very":[7],"large":[8],"scale":[9],"integration)":[10],"implementation":[11],"of":[12,80,100],"a":[13,21,39],"direct":[14],"digital":[15,111],"frequency":[16],"synthesizer":[17],"(DDFS)":[18],"based":[19,103],"on":[20,55,66,104],"hybrid":[22,77,105],"CORDIC":[23,78,106],"(COordinate":[24],"Rotation":[25],"DIgital":[26],"Computer)":[27],"algorithm.":[28],"It":[29],"is":[30],"shown":[31],"that":[32],"can":[35],"be":[36],"implemented":[37],"as":[38],"multiplier-less,":[40],"small":[41],"ROM":[42],"(":[43],"4":[44],"\u00d7":[45],"16":[46],"-bit)":[47],"pipelined":[49],"data":[50],"path.":[51],"A":[52],"SoC":[53],"(system":[54],"chip)":[56],"has":[57],"been":[58],"designed":[59],"with":[60,110],"0/18\u00b5m":[61],"1P6M":[62],"CMOS,":[63],"emulated":[65],"Xilinx":[67],"FPGA":[68],"(field":[69],"programmable":[70],"gate":[71],"array).":[72],"The":[73,98],"proposed":[74],"technique":[75],"uses":[76],"algorithm":[79,107],"sine":[81],"cosine":[83],"functions":[84],"to":[85],"achieve":[86],"more":[87],"than":[88],"84.4-dB":[89],"<inf":[90],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[91],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">c</inf>":[92],"spurious":[93],"free":[94],"dynamic":[95],"range":[96],"(SFDR).":[97],"performances":[99],"novel":[101],"DDFS":[102],"compares":[108],"favorably":[109],"circuit":[112],"design,":[113],"power":[114],"consumption":[115],"SFDR.":[117]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":4},{"year":2013,"cited_by_count":4},{"year":2012,"cited_by_count":2}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}
