{"id":"https://openalex.org/W2153632967","doi":"https://doi.org/10.1109/iscas.2008.4542185","title":"Optimization technique for flip-flop inserted global interconnect","display_name":"Optimization technique for flip-flop inserted global interconnect","publication_year":2008,"publication_date":"2008-05-01","ids":{"openalex":"https://openalex.org/W2153632967","doi":"https://doi.org/10.1109/iscas.2008.4542185","mag":"2153632967"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2008.4542185","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2008.4542185","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101701842","display_name":"Jingye Xu","orcid":"https://orcid.org/0000-0003-4084-0349"},"institutions":[{"id":"https://openalex.org/I39422238","display_name":"University of Illinois Chicago","ror":"https://ror.org/02mpq6x41","country_code":"US","type":"education","lineage":["https://openalex.org/I39422238"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Jingye Xu","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Illinois at Chicago, 851 South Morgan St, 60607, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Illinois at Chicago, 851 South Morgan St, 60607, USA","institution_ids":["https://openalex.org/I39422238"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5109237377","display_name":"Abinash Roy","orcid":null},"institutions":[{"id":"https://openalex.org/I39422238","display_name":"University of Illinois Chicago","ror":"https://ror.org/02mpq6x41","country_code":"US","type":"education","lineage":["https://openalex.org/I39422238"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Abinash Roy","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Illinois at Chicago, 851 South Morgan St, 60607, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Illinois at Chicago, 851 South Morgan St, 60607, USA","institution_ids":["https://openalex.org/I39422238"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5075580787","display_name":"Masud H. Chowdhury","orcid":"https://orcid.org/0000-0002-2341-8528"},"institutions":[{"id":"https://openalex.org/I39422238","display_name":"University of Illinois Chicago","ror":"https://ror.org/02mpq6x41","country_code":"US","type":"education","lineage":["https://openalex.org/I39422238"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Masud H. Chowdhury","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Illinois at Chicago, 851 South Morgan St, 60607, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Illinois at Chicago, 851 South Morgan St, 60607, USA","institution_ids":["https://openalex.org/I39422238"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5101701842"],"corresponding_institution_ids":["https://openalex.org/I39422238"],"apc_list":null,"apc_paid":null,"fwci":0.6659,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.74540762,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"3386","last_page":"3389"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/repeater","display_name":"Repeater (horology)","score":0.8156260251998901},{"id":"https://openalex.org/keywords/flip-flop","display_name":"Flip-flop","score":0.7030065655708313},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.7029945850372314},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6633576154708862},{"id":"https://openalex.org/keywords/reliability","display_name":"Reliability (semiconductor)","score":0.6630998849868774},{"id":"https://openalex.org/keywords/flops","display_name":"FLOPS","score":0.5745644569396973},{"id":"https://openalex.org/keywords/figure-of-merit","display_name":"Figure of merit","score":0.5181447267532349},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4910156726837158},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.47820138931274414},{"id":"https://openalex.org/keywords/power-consumption","display_name":"Power consumption","score":0.46047109365463257},{"id":"https://openalex.org/keywords/block","display_name":"Block (permutation group theory)","score":0.43347740173339844},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3108784556388855},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.1925819218158722},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1833690106868744},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.13916009664535522},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.09364327788352966}],"concepts":[{"id":"https://openalex.org/C195545963","wikidata":"https://www.wikidata.org/wiki/Q1469803","display_name":"Repeater (horology)","level":3,"score":0.8156260251998901},{"id":"https://openalex.org/C2781007278","wikidata":"https://www.wikidata.org/wiki/Q183406","display_name":"Flip-flop","level":3,"score":0.7030065655708313},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.7029945850372314},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6633576154708862},{"id":"https://openalex.org/C43214815","wikidata":"https://www.wikidata.org/wiki/Q7310987","display_name":"Reliability (semiconductor)","level":3,"score":0.6630998849868774},{"id":"https://openalex.org/C3826847","wikidata":"https://www.wikidata.org/wiki/Q188768","display_name":"FLOPS","level":2,"score":0.5745644569396973},{"id":"https://openalex.org/C130277099","wikidata":"https://www.wikidata.org/wiki/Q3676605","display_name":"Figure of merit","level":2,"score":0.5181447267532349},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4910156726837158},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.47820138931274414},{"id":"https://openalex.org/C2984118289","wikidata":"https://www.wikidata.org/wiki/Q29954","display_name":"Power consumption","level":3,"score":0.46047109365463257},{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.43347740173339844},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3108784556388855},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.1925819218158722},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1833690106868744},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.13916009664535522},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.09364327788352966},{"id":"https://openalex.org/C31972630","wikidata":"https://www.wikidata.org/wiki/Q844240","display_name":"Computer vision","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0},{"id":"https://openalex.org/C125411270","wikidata":"https://www.wikidata.org/wiki/Q18653","display_name":"Encoding (memory)","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas.2008.4542185","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2008.4542185","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.6200000047683716}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W1556480701","https://openalex.org/W2099190567","https://openalex.org/W2113676942","https://openalex.org/W2122219454","https://openalex.org/W2144481311","https://openalex.org/W2153889277","https://openalex.org/W2155349713","https://openalex.org/W2159463639","https://openalex.org/W2160010046","https://openalex.org/W2170650195","https://openalex.org/W4240722455","https://openalex.org/W4247138382","https://openalex.org/W6675008304","https://openalex.org/W6682767452","https://openalex.org/W6684766251"],"related_works":["https://openalex.org/W4315697128","https://openalex.org/W2776248796","https://openalex.org/W2494161373","https://openalex.org/W2055545425","https://openalex.org/W2262031297","https://openalex.org/W2024069812","https://openalex.org/W2056378213","https://openalex.org/W2045056374","https://openalex.org/W2298981088","https://openalex.org/W2497016410"],"abstract_inverted_index":{"The":[0],"design":[1,64],"targets":[2],"of":[3,28,31,36,45,52,58,78,86],"an":[4,25],"interconnect":[5,98],"are":[6],"to":[7,70],"ensure":[8],"less":[9],"delay":[10],"cycles,":[11],"high":[12],"reliability":[13,33],"and":[14,41,55,75],"low":[15],"power":[16,43],"consumption":[17,44],"at":[18],"the":[19,29,32,42,50,56,63,72,76,94],"same":[20],"time.":[21],"This":[22,88],"paper":[23],"presents":[24],"in-depth":[26],"analysis":[27],"dependencies":[30],"(in":[34],"terms":[35],"bit":[37],"error":[38],"rate":[39],"(BER))":[40],"wire":[46],"pipelining":[47,99],"scheme":[48],"on":[49],"number":[51,77],"inserted":[53],"flip-flops":[54,79],"size":[57,74],"repeaters.":[59],"To":[60],"trade":[61],"off":[62],"targets,":[65],"a":[66,83],"methodology":[67,89],"is":[68,90],"developed":[69],"optimize":[71],"repeater":[73],"inserted,":[80],"which":[81],"maximizes":[82],"user-specified":[84],"figure":[85],"merit.":[87],"demonstrated":[91],"by":[92],"calculating":[93],"optimal":[95],"solutions":[96],"for":[97,100,105],"some":[101],"International":[102],"Technology":[103],"Roadmap":[104],"Semiconductor":[106],"technology":[107],"nodes.":[108]},"counts_by_year":[{"year":2018,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}