{"id":"https://openalex.org/W2114619975","doi":"https://doi.org/10.1109/iscas.2008.4542068","title":"ASIC hardware implementations for 512-bit hash function Whirlpool","display_name":"ASIC hardware implementations for 512-bit hash function Whirlpool","publication_year":2008,"publication_date":"2008-05-01","ids":{"openalex":"https://openalex.org/W2114619975","doi":"https://doi.org/10.1109/iscas.2008.4542068","mag":"2114619975"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2008.4542068","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2008.4542068","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5079714900","display_name":"Akashi Satoh","orcid":null},"institutions":[{"id":"https://openalex.org/I73613424","display_name":"National Institute of Advanced Industrial Science and Technology","ror":"https://ror.org/01703db54","country_code":"JP","type":"government","lineage":["https://openalex.org/I73613424"]}],"countries":["JP"],"is_corresponding":true,"raw_author_name":"Akashi Satoh","raw_affiliation_strings":["National Institute of Advanced Industrial Science and Technology, Research Center for Information Security, Japan","Sangyo Gijutsu Sogo Kenkyujo, Chiyoda-ku, Tokyo, JP"],"affiliations":[{"raw_affiliation_string":"National Institute of Advanced Industrial Science and Technology, Research Center for Information Security, Japan","institution_ids":["https://openalex.org/I73613424"]},{"raw_affiliation_string":"Sangyo Gijutsu Sogo Kenkyujo, Chiyoda-ku, Tokyo, JP","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5079714900"],"corresponding_institution_ids":["https://openalex.org/I73613424"],"apc_list":null,"apc_paid":null,"fwci":4.0044,"has_fulltext":false,"cited_by_count":14,"citation_normalized_percentile":{"value":0.936969,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":"1","issue":null,"first_page":"2917","last_page":"2920"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10951","display_name":"Cryptographic Implementations and Security","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10951","display_name":"Cryptographic Implementations and Security","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11130","display_name":"Coding theory and cryptography","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12326","display_name":"Network Packet Processing and Optimization","score":0.9926000237464905,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/application-specific-integrated-circuit","display_name":"Application-specific integrated circuit","score":0.7556518316268921},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7389165759086609},{"id":"https://openalex.org/keywords/datapath","display_name":"Datapath","score":0.6624869108200073},{"id":"https://openalex.org/keywords/throughput","display_name":"Throughput","score":0.6359877586364746},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6306544542312622},{"id":"https://openalex.org/keywords/hash-function","display_name":"Hash function","score":0.5810737609863281},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.573033332824707},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5568178296089172},{"id":"https://openalex.org/keywords/standard-cell","display_name":"Standard cell","score":0.4792737662792206},{"id":"https://openalex.org/keywords/gate-count","display_name":"Gate count","score":0.4656219184398651},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.4648389518260956},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.10497260093688965},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.10295665264129639},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.10115158557891846},{"id":"https://openalex.org/keywords/wireless","display_name":"Wireless","score":0.06725609302520752},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.060149937868118286}],"concepts":[{"id":"https://openalex.org/C77390884","wikidata":"https://www.wikidata.org/wiki/Q217302","display_name":"Application-specific integrated circuit","level":2,"score":0.7556518316268921},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7389165759086609},{"id":"https://openalex.org/C2781198647","wikidata":"https://www.wikidata.org/wiki/Q1633673","display_name":"Datapath","level":2,"score":0.6624869108200073},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.6359877586364746},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6306544542312622},{"id":"https://openalex.org/C99138194","wikidata":"https://www.wikidata.org/wiki/Q183427","display_name":"Hash function","level":2,"score":0.5810737609863281},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.573033332824707},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5568178296089172},{"id":"https://openalex.org/C78401558","wikidata":"https://www.wikidata.org/wiki/Q464496","display_name":"Standard cell","level":3,"score":0.4792737662792206},{"id":"https://openalex.org/C2777892113","wikidata":"https://www.wikidata.org/wiki/Q5527005","display_name":"Gate count","level":2,"score":0.4656219184398651},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.4648389518260956},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.10497260093688965},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.10295665264129639},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.10115158557891846},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.06725609302520752},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.060149937868118286},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas.2008.4542068","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2008.4542068","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.46000000834465027,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W1660562555","https://openalex.org/W2009582397","https://openalex.org/W2046927349","https://openalex.org/W2070377770","https://openalex.org/W2124095839","https://openalex.org/W2128528543","https://openalex.org/W2139054684","https://openalex.org/W2140372916","https://openalex.org/W2916086000","https://openalex.org/W3143985718","https://openalex.org/W3145042860"],"related_works":["https://openalex.org/W2889102485","https://openalex.org/W2388299947","https://openalex.org/W2134697552","https://openalex.org/W2113599973","https://openalex.org/W4385831984","https://openalex.org/W3047211184","https://openalex.org/W2070693700","https://openalex.org/W2158494242","https://openalex.org/W2169589717","https://openalex.org/W4243638536"],"abstract_inverted_index":{"Hardware":[0],"architectures":[1,25,172],"for":[2,99,147,173],"the":[3,12,20,23,56,84,95,136,141,145,152,165,174,184],"512-bit":[4],"hash":[5,77],"function":[6,178],"Whirlpool,":[7,133],"which":[8,50,82],"is":[9,51,157],"one":[10],"of":[11,22,41,48,131,164,167],"ISO/IEC":[13],"10118-3":[14],"standard":[15,32,76],"algorithms,":[16],"are":[17,26,83,126,143,180],"proposed":[18,24],"and":[19,80,104,114,124,134,149,176],"performances":[21],"evaluated":[27],"using":[28,94],"a":[29,39,45],"0.18-\u03bcm":[30],"CMOS":[31],"cell":[33],"library.":[34],"The":[35,73,102,121,170],"fastest":[36,57],"implementation":[37,59,66],"achieved":[38,108],"throughput":[40,125],"9.59":[42],"Gbps":[43],"with":[44,70,111,117],"gate":[46,122],"count":[47,123],"167.4K,":[49],"two":[52],"times":[53],"faster":[54],"than":[55,160],"conventional":[58],"on":[60],"an":[61],"FPGA":[62],"platform.":[63],"A":[64],"compact":[65],"obtained":[67],"38.9":[68],"Kgates":[69,110,116],"2.49":[71],"Gbps.":[72],"FIPS":[74],"180-2":[75],"functions":[78],"SHA-256":[79,106],"SHA-512,":[81],"most":[85],"popular":[86],"algorithms":[87],"in":[88,151,162,183],"practical":[89],"use,":[90],"were":[91],"also":[92,181],"synthesized":[93],"same":[96,146],"ASIC":[97],"library":[98],"performance":[100],"comparisons.":[101],"small":[103],"fast":[105],"implementations":[107],"11.0":[109],"726":[112],"Mbps":[113],"30.7":[115],"1.97":[118],"Gbps,":[119],"respectively.":[120],"both":[127],"approximately":[128],"1/4":[129],"those":[130],"to":[132],"thus":[135],"hardware":[137,168],"efficiencies":[138],"defined":[139],"as":[140],"throughput/gate":[142],"almost":[144],"SHA-256/-512":[148,161],"Whirlpool":[150,156],"present":[153,185],"implementations.":[154],"However,":[155],"more":[158],"flexible":[159],"terms":[163],"variety":[166],"architectures.":[169],"various":[171],"datapath":[175],"primitive":[177],"blocks":[179],"described":[182],"paper.":[186]},"counts_by_year":[{"year":2020,"cited_by_count":2},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":2},{"year":2014,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
