{"id":"https://openalex.org/W2166334142","doi":"https://doi.org/10.1109/iscas.2008.4541464","title":"Automated conversion of Simulink designs to analog hardware on an FPAA","display_name":"Automated conversion of Simulink designs to analog hardware on an FPAA","publication_year":2008,"publication_date":"2008-05-01","ids":{"openalex":"https://openalex.org/W2166334142","doi":"https://doi.org/10.1109/iscas.2008.4541464","mag":"2166334142"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2008.4541464","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2008.4541464","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 IEEE International Symposium on Circuits and Systems","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5111494347","display_name":"Csaba Petre","orcid":null},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"C. Petre","raw_affiliation_strings":["School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, 30332, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","institution_ids":["https://openalex.org/I130701444"]},{"raw_affiliation_string":"School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, 30332, USA","institution_ids":["https://openalex.org/I130701444"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5091068770","display_name":"Craig Schlottmann","orcid":null},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"C. Schlottmann","raw_affiliation_strings":["School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, 30332, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","institution_ids":["https://openalex.org/I130701444"]},{"raw_affiliation_string":"School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, 30332, USA","institution_ids":["https://openalex.org/I130701444"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5105781337","display_name":"P. Hasler","orcid":null},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"P. Hasler","raw_affiliation_strings":["School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, 30332, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","institution_ids":["https://openalex.org/I130701444"]},{"raw_affiliation_string":"School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, 30332, USA","institution_ids":["https://openalex.org/I130701444"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I130701444"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":18,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":"1","issue":null,"first_page":"500","last_page":"503"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9972000122070312,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12162","display_name":"Cellular Automata and Applications","score":0.9958999752998352,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-analog-array","display_name":"Field-programmable analog array","score":0.98055100440979},{"id":"https://openalex.org/keywords/netlist","display_name":"Netlist","score":0.8742631673812866},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6055017709732056},{"id":"https://openalex.org/keywords/neuromorphic-engineering","display_name":"Neuromorphic engineering","score":0.5738283395767212},{"id":"https://openalex.org/keywords/automation","display_name":"Automation","score":0.5068040490150452},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4685942232608795},{"id":"https://openalex.org/keywords/spice","display_name":"Spice","score":0.46800389885902405},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.45772987604141235},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4465142786502838},{"id":"https://openalex.org/keywords/schematic","display_name":"Schematic","score":0.4380509853363037},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4115493893623352},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.336211234331131},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.30129560828208923},{"id":"https://openalex.org/keywords/analog-signal","display_name":"Analog signal","score":0.2551252245903015},{"id":"https://openalex.org/keywords/analog-multiplier","display_name":"Analog multiplier","score":0.21814143657684326},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.09327727556228638},{"id":"https://openalex.org/keywords/artificial-neural-network","display_name":"Artificial neural network","score":0.08099153637886047}],"concepts":[{"id":"https://openalex.org/C149128552","wikidata":"https://www.wikidata.org/wiki/Q380201","display_name":"Field-programmable analog array","level":5,"score":0.98055100440979},{"id":"https://openalex.org/C177650935","wikidata":"https://www.wikidata.org/wiki/Q1760303","display_name":"Netlist","level":2,"score":0.8742631673812866},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6055017709732056},{"id":"https://openalex.org/C151927369","wikidata":"https://www.wikidata.org/wiki/Q1981312","display_name":"Neuromorphic engineering","level":3,"score":0.5738283395767212},{"id":"https://openalex.org/C115901376","wikidata":"https://www.wikidata.org/wiki/Q184199","display_name":"Automation","level":2,"score":0.5068040490150452},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4685942232608795},{"id":"https://openalex.org/C2780077345","wikidata":"https://www.wikidata.org/wiki/Q16891888","display_name":"Spice","level":2,"score":0.46800389885902405},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.45772987604141235},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4465142786502838},{"id":"https://openalex.org/C192328126","wikidata":"https://www.wikidata.org/wiki/Q4514647","display_name":"Schematic","level":2,"score":0.4380509853363037},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4115493893623352},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.336211234331131},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.30129560828208923},{"id":"https://openalex.org/C13412647","wikidata":"https://www.wikidata.org/wiki/Q174948","display_name":"Analog signal","level":3,"score":0.2551252245903015},{"id":"https://openalex.org/C98142538","wikidata":"https://www.wikidata.org/wiki/Q485005","display_name":"Analog multiplier","level":4,"score":0.21814143657684326},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.09327727556228638},{"id":"https://openalex.org/C50644808","wikidata":"https://www.wikidata.org/wiki/Q192776","display_name":"Artificial neural network","level":2,"score":0.08099153637886047},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas.2008.4541464","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2008.4541464","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 IEEE International Symposium on Circuits and Systems","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure","score":0.41999998688697815}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":8,"referenced_works":["https://openalex.org/W2038078811","https://openalex.org/W2100734450","https://openalex.org/W2101485986","https://openalex.org/W2108137614","https://openalex.org/W2128890914","https://openalex.org/W2139016795","https://openalex.org/W2168153801","https://openalex.org/W6680419907"],"related_works":["https://openalex.org/W4404652992","https://openalex.org/W2253391080","https://openalex.org/W2365383750","https://openalex.org/W1590828620","https://openalex.org/W2147968839","https://openalex.org/W144590410","https://openalex.org/W2100447044","https://openalex.org/W2113225350","https://openalex.org/W1435266366","https://openalex.org/W1156564840"],"abstract_inverted_index":{"We":[0],"have":[1,41],"designed":[2],"an":[3,31],"automation":[4],"tool":[5],"which":[6,14],"converts":[7],"Simulink":[8],"models":[9],"to":[10,20,40,50],"a":[11,42],"Spice":[12],"netlist,":[13],"can":[15],"then":[16],"be":[17],"automatically":[18],"compiled":[19],"FPAA":[21],"(Field":[22],"Programmable":[23],"Analog":[24],"Array)":[25],"targeting":[26],"code":[27],"and":[28,37],"implemented":[29],"on":[30],"FPAA.":[32],"This":[33],"will":[34],"allow":[35],"DSP":[36],"neuromorphic":[38],"engineers":[39],"fast,":[43],"low":[44],"power":[45],"analog":[46],"solution,":[47],"without":[48],"having":[49],"gain":[51],"the":[52],"necessary":[53],"expertise":[54],"in":[55],"circuit":[56],"design.":[57]},"counts_by_year":[{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":1},{"year":2014,"cited_by_count":1},{"year":2013,"cited_by_count":1}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}
