{"id":"https://openalex.org/W1494668715","doi":"https://doi.org/10.1109/iscas.2006.1693866","title":"Congestion-driven W-shape Multilevel Full-chip Routing Framework","display_name":"Congestion-driven W-shape Multilevel Full-chip Routing Framework","publication_year":2006,"publication_date":"2006-09-22","ids":{"openalex":"https://openalex.org/W1494668715","doi":"https://doi.org/10.1109/iscas.2006.1693866","mag":"1494668715"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2006.1693866","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2006.1693866","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2006 IEEE International Symposium on Circuits and Systems","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5058812423","display_name":"Hailong Yao","orcid":"https://orcid.org/0000-0002-8750-3086"},"institutions":[{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Hailong Yao","raw_affiliation_strings":["Department of Computer Science and Technology, Tsinghua University, Beijing, China","Dept. of Computer Science & Technology, Tsinghua University, Beijing, China#TAB#"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Technology, Tsinghua University, Beijing, China","institution_ids":["https://openalex.org/I99065089"]},{"raw_affiliation_string":"Dept. of Computer Science & Technology, Tsinghua University, Beijing, China#TAB#","institution_ids":["https://openalex.org/I99065089"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5111983610","display_name":"Yici Cai","orcid":null},"institutions":[{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yici Cai","raw_affiliation_strings":["Department of Computer Science and Technology, Tsinghua University, Beijing, China","Dept. of Computer Science & Technology, Tsinghua University, Beijing, China#TAB#"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Technology, Tsinghua University, Beijing, China","institution_ids":["https://openalex.org/I99065089"]},{"raw_affiliation_string":"Dept. of Computer Science & Technology, Tsinghua University, Beijing, China#TAB#","institution_ids":["https://openalex.org/I99065089"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5111768666","display_name":"Xianlong Hong","orcid":null},"institutions":[{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xianlong Hong","raw_affiliation_strings":["Department of Computer Science and Technology, Tsinghua University, Beijing, China","Dept. of Computer Science & Technology, Tsinghua University, Beijing, China#TAB#"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Technology, Tsinghua University, Beijing, China","institution_ids":["https://openalex.org/I99065089"]},{"raw_affiliation_string":"Dept. of Computer Science & Technology, Tsinghua University, Beijing, China#TAB#","institution_ids":["https://openalex.org/I99065089"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5058812423"],"corresponding_institution_ids":["https://openalex.org/I99065089"],"apc_list":null,"apc_paid":null,"fwci":0.7522,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.71284397,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"5447","last_page":"5450"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/benchmark","display_name":"Benchmark (surveying)","score":0.7988452911376953},{"id":"https://openalex.org/keywords/routing","display_name":"Routing (electronic design automation)","score":0.7074189186096191},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6355898380279541},{"id":"https://openalex.org/keywords/hierarchical-routing","display_name":"Hierarchical routing","score":0.5032755732536316},{"id":"https://openalex.org/keywords/flow","display_name":"Flow (mathematics)","score":0.4541054666042328},{"id":"https://openalex.org/keywords/static-routing","display_name":"Static routing","score":0.34662145376205444},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.22290027141571045},{"id":"https://openalex.org/keywords/routing-protocol","display_name":"Routing protocol","score":0.15348678827285767},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.09938636422157288}],"concepts":[{"id":"https://openalex.org/C185798385","wikidata":"https://www.wikidata.org/wiki/Q1161707","display_name":"Benchmark (surveying)","level":2,"score":0.7988452911376953},{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.7074189186096191},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6355898380279541},{"id":"https://openalex.org/C177818476","wikidata":"https://www.wikidata.org/wiki/Q12878103","display_name":"Hierarchical routing","level":5,"score":0.5032755732536316},{"id":"https://openalex.org/C38349280","wikidata":"https://www.wikidata.org/wiki/Q1434290","display_name":"Flow (mathematics)","level":2,"score":0.4541054666042328},{"id":"https://openalex.org/C204948658","wikidata":"https://www.wikidata.org/wiki/Q1119410","display_name":"Static routing","level":4,"score":0.34662145376205444},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.22290027141571045},{"id":"https://openalex.org/C104954878","wikidata":"https://www.wikidata.org/wiki/Q1648707","display_name":"Routing protocol","level":3,"score":0.15348678827285767},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.09938636422157288},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C205649164","wikidata":"https://www.wikidata.org/wiki/Q1071","display_name":"Geography","level":0,"score":0.0},{"id":"https://openalex.org/C13280743","wikidata":"https://www.wikidata.org/wiki/Q131089","display_name":"Geodesy","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas.2006.1693866","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2006.1693866","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2006 IEEE International Symposium on Circuits and Systems","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.46000000834465027,"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":17,"referenced_works":["https://openalex.org/W1972047514","https://openalex.org/W2120048388","https://openalex.org/W2121290396","https://openalex.org/W2126950153","https://openalex.org/W2135477945","https://openalex.org/W2140739091","https://openalex.org/W2151734895","https://openalex.org/W2155462145","https://openalex.org/W2158523263","https://openalex.org/W2168008340","https://openalex.org/W2170815710","https://openalex.org/W4230223219","https://openalex.org/W4250691508","https://openalex.org/W4255649577","https://openalex.org/W6678108464","https://openalex.org/W6682751354","https://openalex.org/W6685076165"],"related_works":["https://openalex.org/W2461681138","https://openalex.org/W2166337697","https://openalex.org/W2155400411","https://openalex.org/W2099425460","https://openalex.org/W2220567392","https://openalex.org/W2080850032","https://openalex.org/W2353886381","https://openalex.org/W2979601444","https://openalex.org/W1987148631","https://openalex.org/W2113703515"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"a":[3,48],"novel":[4],"W-shape":[5,14],"multilevel":[6,60],"full-chip":[7],"routing":[8,26,41,61],"framework.":[9],"The":[10,17,43,63],"framework":[11,44],"features":[12],"the":[13,24,29,36,39,58],"optimization":[15],"flow.":[16],"first":[18],"V-shape":[19,31],"flow":[20,32],"aims":[21],"to":[22,34],"optimize":[23],"global":[25],"solution.":[27],"And":[28],"second":[30],"intends":[33],"improve":[35],"quality":[37],"of":[38,50],"detailed":[40],"result.":[42],"is":[45],"tested":[46],"on":[47],"set":[49],"commonly":[51],"used":[52],"benchmark":[53],"circuits":[54],"and":[55],"compared":[56],"with":[57],"previous":[59],"systems.":[62],"experimental":[64],"results":[65],"are":[66],"promising.":[67]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}