{"id":"https://openalex.org/W2028760262","doi":"https://doi.org/10.1109/iscas.2006.1693712","title":"High-speed hardware architectures for authenticated encryption mode GCM","display_name":"High-speed hardware architectures for authenticated encryption mode GCM","publication_year":2006,"publication_date":"2006-09-22","ids":{"openalex":"https://openalex.org/W2028760262","doi":"https://doi.org/10.1109/iscas.2006.1693712","mag":"2028760262"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2006.1693712","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2006.1693712","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2006 IEEE International Symposium on Circuits and Systems","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5079714900","display_name":"Akashi Satoh","orcid":null},"institutions":[{"id":"https://openalex.org/I1341412227","display_name":"IBM (United States)","ror":"https://ror.org/05hh8d621","country_code":"US","type":"company","lineage":["https://openalex.org/I1341412227"]},{"id":"https://openalex.org/I4210145865","display_name":"IBM Research - Tokyo","ror":"https://ror.org/04915qk43","country_code":"JP","type":"facility","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210114115","https://openalex.org/I4210145865"]}],"countries":["JP","US"],"is_corresponding":true,"raw_author_name":"A. Satoh","raw_affiliation_strings":["IBM Research, Yamato, Kanagawa, Japan","Tokyo Res. Lab., IBM Res., Kanagawa"],"affiliations":[{"raw_affiliation_string":"IBM Research, Yamato, Kanagawa, Japan","institution_ids":["https://openalex.org/I4210145865"]},{"raw_affiliation_string":"Tokyo Res. Lab., IBM Res., Kanagawa","institution_ids":["https://openalex.org/I1341412227"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5079714900"],"corresponding_institution_ids":["https://openalex.org/I1341412227","https://openalex.org/I4210145865"],"apc_list":null,"apc_paid":null,"fwci":4.7155882,"has_fulltext":false,"cited_by_count":35,"citation_normalized_percentile":{"value":0.94850266,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"4","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10951","display_name":"Cryptographic Implementations and Security","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10951","display_name":"Cryptographic Implementations and Security","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11130","display_name":"Coding theory and cryptography","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12326","display_name":"Network Packet Processing and Optimization","score":0.9975000023841858,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7489565014839172},{"id":"https://openalex.org/keywords/gcm-transcription-factors","display_name":"GCM transcription factors","score":0.6034584045410156},{"id":"https://openalex.org/keywords/advanced-encryption-standard","display_name":"Advanced Encryption Standard","score":0.5995018482208252},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.5911957621574402},{"id":"https://openalex.org/keywords/encryption","display_name":"Encryption","score":0.5776458978652954},{"id":"https://openalex.org/keywords/key","display_name":"Key (lock)","score":0.5731092095375061},{"id":"https://openalex.org/keywords/block","display_name":"Block (permutation group theory)","score":0.5654388666152954},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.532840371131897},{"id":"https://openalex.org/keywords/throughput","display_name":"Throughput","score":0.5013489723205566},{"id":"https://openalex.org/keywords/standard-cell","display_name":"Standard cell","score":0.4904317557811737},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4493286907672882},{"id":"https://openalex.org/keywords/shift-register","display_name":"Shift register","score":0.43325236439704895},{"id":"https://openalex.org/keywords/block-size","display_name":"Block size","score":0.42429319024086},{"id":"https://openalex.org/keywords/macro","display_name":"Macro","score":0.41590720415115356},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.22064027190208435},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.11491841077804565},{"id":"https://openalex.org/keywords/wireless","display_name":"Wireless","score":0.10297155380249023},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.1005079448223114},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.09388911724090576},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.09225523471832275}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7489565014839172},{"id":"https://openalex.org/C143742823","wikidata":"https://www.wikidata.org/wiki/Q5513004","display_name":"GCM transcription factors","level":4,"score":0.6034584045410156},{"id":"https://openalex.org/C94520183","wikidata":"https://www.wikidata.org/wiki/Q190746","display_name":"Advanced Encryption Standard","level":3,"score":0.5995018482208252},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.5911957621574402},{"id":"https://openalex.org/C148730421","wikidata":"https://www.wikidata.org/wiki/Q141090","display_name":"Encryption","level":2,"score":0.5776458978652954},{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.5731092095375061},{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.5654388666152954},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.532840371131897},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.5013489723205566},{"id":"https://openalex.org/C78401558","wikidata":"https://www.wikidata.org/wiki/Q464496","display_name":"Standard cell","level":3,"score":0.4904317557811737},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4493286907672882},{"id":"https://openalex.org/C49654631","wikidata":"https://www.wikidata.org/wiki/Q746165","display_name":"Shift register","level":3,"score":0.43325236439704895},{"id":"https://openalex.org/C41431624","wikidata":"https://www.wikidata.org/wiki/Q1053357","display_name":"Block size","level":3,"score":0.42429319024086},{"id":"https://openalex.org/C166955791","wikidata":"https://www.wikidata.org/wiki/Q629579","display_name":"Macro","level":2,"score":0.41590720415115356},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.22064027190208435},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.11491841077804565},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.10297155380249023},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.1005079448223114},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.09388911724090576},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.09225523471832275},{"id":"https://openalex.org/C132651083","wikidata":"https://www.wikidata.org/wiki/Q7942","display_name":"Climate change","level":2,"score":0.0},{"id":"https://openalex.org/C18903297","wikidata":"https://www.wikidata.org/wiki/Q7150","display_name":"Ecology","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C141452985","wikidata":"https://www.wikidata.org/wiki/Q650994","display_name":"General Circulation Model","level":3,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas.2006.1693712","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2006.1693712","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2006 IEEE International Symposium on Circuits and Systems","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","score":0.44999998807907104,"display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":6,"referenced_works":["https://openalex.org/W13103650","https://openalex.org/W112964067","https://openalex.org/W2112244944","https://openalex.org/W2185409408","https://openalex.org/W3031861560","https://openalex.org/W6778679350"],"related_works":["https://openalex.org/W2601653481","https://openalex.org/W2319954030","https://openalex.org/W3093548570","https://openalex.org/W1984627999","https://openalex.org/W2080651907","https://openalex.org/W2789033046","https://openalex.org/W1975649745","https://openalex.org/W2128461337","https://openalex.org/W2046202030","https://openalex.org/W2132467127"],"abstract_inverted_index":{"We":[0],"propose":[1],"various":[2,14],"high-speed":[3],"hardware":[4,19,28],"architectures":[5,91],"for":[6],"GCM":[7,56],"(Galois":[8],"counter":[9],"mode)":[10],"in":[11],"conjunction":[12],"with":[13,48,58,80,85,108],"AES":[15,61],"(advanced":[16],"encryption":[17],"standard)":[18],"macros,":[20],"and":[21,27,73,98],"clarify":[22],"the":[23,74],"trade-offs":[24],"between":[25],"speed":[26],"resources.":[29],"The":[30,42],"designs":[31,115,121],"were":[32],"evaluated":[33],"by":[34],"using":[35],"a":[36,54,59,64],"0.13-mum":[37],"CMOS":[38],"standard":[39],"cell":[40],"library.":[41],"highest":[43],"throughput":[44],"of":[45,77,89,95,113],"42.7":[46],"Gbps":[47,82],"297":[49],"Kgates":[50,79],"was":[51,83],"obtained":[52],"from":[53],"sequential":[55],"architecture":[57],"full-pipelined":[60],"circuit":[62],"where":[63],"128-bit":[65],"data":[66],"block":[67],"is":[68],"processed":[69],"on":[70],"every":[71],"clock,":[72],"smallest":[75],"size":[76],"73":[78],"6.4":[81],"achieved":[84],"pipelined-loop":[86],"architecture.":[87],"All":[88],"our":[90,114],"support":[92],"key":[93,110],"sizes":[94],"128,":[96],"192,":[97],"256":[99],"bits,":[100],"while":[101],"only":[102],"one":[103],"previous":[104],"approach":[105],"does.":[106],"Even":[107],"variable-length":[109],"support,":[111],"all":[112],"showed":[116],"higher":[117],"performance":[118],"than":[119],"conventional":[120]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":2},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":1},{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":4},{"year":2013,"cited_by_count":3}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
