{"id":"https://openalex.org/W1962553068","doi":"https://doi.org/10.1109/iscas.2006.1693441","title":"On the topographic equivalence between voltage mode and current mode ranked order filters for array processors","display_name":"On the topographic equivalence between voltage mode and current mode ranked order filters for array processors","publication_year":2006,"publication_date":"2006-09-22","ids":{"openalex":"https://openalex.org/W1962553068","doi":"https://doi.org/10.1109/iscas.2006.1693441","mag":"1962553068"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2006.1693441","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2006.1693441","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2006 IEEE International Symposium on Circuits and Systems","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5068173798","display_name":"Jussi Poikonen","orcid":null},"institutions":[{"id":"https://openalex.org/I155660961","display_name":"University of Turku","ror":"https://ror.org/05vghhr25","country_code":"FI","type":"education","lineage":["https://openalex.org/I155660961"]},{"id":"https://openalex.org/I183173800","display_name":"Turku Centre for Computer Science","ror":"https://ror.org/00vy7ed73","country_code":"FI","type":"facility","lineage":["https://openalex.org/I130217899","https://openalex.org/I155660961","https://openalex.org/I183173800"]}],"countries":["FI"],"is_corresponding":false,"raw_author_name":"J. Poikonen","raw_affiliation_strings":["Microelectronics Laboratory, Department of Information Technology, University of Turku, Finland","Turku Center for Computer Science, Turku, Finland"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Microelectronics Laboratory, Department of Information Technology, University of Turku, Finland","institution_ids":["https://openalex.org/I155660961"]},{"raw_affiliation_string":"Turku Center for Computer Science, Turku, Finland","institution_ids":["https://openalex.org/I183173800"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5038944203","display_name":"A. Paasio","orcid":"https://orcid.org/0000-0003-2543-7391"},"institutions":[{"id":"https://openalex.org/I155660961","display_name":"University of Turku","ror":"https://ror.org/05vghhr25","country_code":"FI","type":"education","lineage":["https://openalex.org/I155660961"]}],"countries":["FI"],"is_corresponding":false,"raw_author_name":"A. Paasio","raw_affiliation_strings":["Microelectronics Laboratory, Department of Information Technology, University of Turku, Finland"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Microelectronics Laboratory, Department of Information Technology, University of Turku, Finland","institution_ids":["https://openalex.org/I155660961"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.11217231,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"1","issue":null,"first_page":"4","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11347","display_name":"Neural Networks Stability and Synchronization","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11347","display_name":"Neural Networks Stability and Synchronization","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10320","display_name":"Neural Networks and Applications","score":0.9961000084877014,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11233","display_name":"Advanced Adaptive Filtering Techniques","score":0.9944000244140625,"subfield":{"id":"https://openalex.org/subfields/2206","display_name":"Computational Mechanics"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6056495904922485},{"id":"https://openalex.org/keywords/massively-parallel","display_name":"Massively parallel","score":0.5961213707923889},{"id":"https://openalex.org/keywords/circuit-complexity","display_name":"Circuit complexity","score":0.5695908069610596},{"id":"https://openalex.org/keywords/filter","display_name":"Filter (signal processing)","score":0.5307217836380005},{"id":"https://openalex.org/keywords/mode","display_name":"Mode (computer interface)","score":0.5273650288581848},{"id":"https://openalex.org/keywords/equivalence","display_name":"Equivalence (formal languages)","score":0.49633365869522095},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.4752523601055145},{"id":"https://openalex.org/keywords/statistic","display_name":"Statistic","score":0.4467846155166626},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.43433430790901184},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.42203235626220703},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.27664244174957275},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2413332760334015},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.18901914358139038},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.16107961535453796}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6056495904922485},{"id":"https://openalex.org/C190475519","wikidata":"https://www.wikidata.org/wiki/Q544384","display_name":"Massively parallel","level":2,"score":0.5961213707923889},{"id":"https://openalex.org/C90702460","wikidata":"https://www.wikidata.org/wiki/Q1055112","display_name":"Circuit complexity","level":3,"score":0.5695908069610596},{"id":"https://openalex.org/C106131492","wikidata":"https://www.wikidata.org/wiki/Q3072260","display_name":"Filter (signal processing)","level":2,"score":0.5307217836380005},{"id":"https://openalex.org/C48677424","wikidata":"https://www.wikidata.org/wiki/Q6888088","display_name":"Mode (computer interface)","level":2,"score":0.5273650288581848},{"id":"https://openalex.org/C2780069185","wikidata":"https://www.wikidata.org/wiki/Q7977945","display_name":"Equivalence (formal languages)","level":2,"score":0.49633365869522095},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.4752523601055145},{"id":"https://openalex.org/C89128539","wikidata":"https://www.wikidata.org/wiki/Q1949963","display_name":"Statistic","level":2,"score":0.4467846155166626},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.43433430790901184},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.42203235626220703},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.27664244174957275},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2413332760334015},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.18901914358139038},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.16107961535453796},{"id":"https://openalex.org/C118615104","wikidata":"https://www.wikidata.org/wiki/Q121416","display_name":"Discrete mathematics","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C31972630","wikidata":"https://www.wikidata.org/wiki/Q844240","display_name":"Computer vision","level":1,"score":0.0},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas.2006.1693441","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2006.1693441","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2006 IEEE International Symposium on Circuits and Systems","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.4099999964237213,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W1985668562","https://openalex.org/W1995283704","https://openalex.org/W2008250351","https://openalex.org/W2070308078","https://openalex.org/W2096487156","https://openalex.org/W2112906478","https://openalex.org/W2114539768","https://openalex.org/W2117114975","https://openalex.org/W2139016795","https://openalex.org/W2146262402","https://openalex.org/W2149574914","https://openalex.org/W2160121923","https://openalex.org/W6680419907"],"related_works":["https://openalex.org/W1970433854","https://openalex.org/W2023867642","https://openalex.org/W1905852083","https://openalex.org/W575709247","https://openalex.org/W2359776416","https://openalex.org/W113996306","https://openalex.org/W81589881","https://openalex.org/W2028391080","https://openalex.org/W201527569","https://openalex.org/W2097928005"],"abstract_inverted_index":{"This":[0],"paper":[1],"examines":[2],"the":[3,15,48],"circuit":[4,23],"implementation":[5],"of":[6,17,47],"programmable":[7],"parallel":[8,61],"analog":[9],"order":[10,21],"statistic":[11],"filtering":[12],"and":[13,45],"compares":[14],"topographies":[16],"two":[18],"compact":[19],"ranked":[20],"filter":[22],"structures,":[24],"which":[25],"have":[26],"been":[27],"proposed":[28],"for":[29,37],"use":[30],"in":[31,58],"a":[32,59],"CNN-type":[33],"array":[34],"processor,":[35],"either":[36],"current":[38],"or":[39],"voltage":[40],"mode":[41],"inputs.":[42],"The":[43],"performance":[44],"complexity":[46],"circuits":[49],"is":[50],"examined":[51],"with":[52],"respect":[53],"to":[54],"their":[55],"practical":[56],"implementability":[57],"massively":[60],"architecture":[62]},"counts_by_year":[],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}