{"id":"https://openalex.org/W1552450190","doi":"https://doi.org/10.1109/iscas.2006.1693365","title":"Zero-IF VGA with Novel Offset Cancellation","display_name":"Zero-IF VGA with Novel Offset Cancellation","publication_year":2006,"publication_date":"2006-09-22","ids":{"openalex":"https://openalex.org/W1552450190","doi":"https://doi.org/10.1109/iscas.2006.1693365","mag":"1552450190"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2006.1693365","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2006.1693365","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2006 IEEE International Symposium on Circuits and Systems","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101444708","display_name":"Chao Yang","orcid":"https://orcid.org/0000-0003-1212-5823"},"institutions":[{"id":"https://openalex.org/I87216513","display_name":"Michigan State University","ror":"https://ror.org/05hs6h993","country_code":"US","type":"education","lineage":["https://openalex.org/I87216513"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Chao Yang","raw_affiliation_strings":["Department of Electrical & Computer Engineering, Michigan State University, East Lansing, MI, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical & Computer Engineering, Michigan State University, East Lansing, MI, USA","institution_ids":["https://openalex.org/I87216513"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5025942859","display_name":"Andrew J. Mason","orcid":"https://orcid.org/0000-0002-6548-1162"},"institutions":[{"id":"https://openalex.org/I87216513","display_name":"Michigan State University","ror":"https://ror.org/05hs6h993","country_code":"US","type":"education","lineage":["https://openalex.org/I87216513"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"A. Mason","raw_affiliation_strings":["Department of Electrical & Computer Engineering, Michigan State University, East Lansing, MI, USA","Dept. of Electr. & Comput. Eng., Michigan State Univ., East Lansing, MI, USA#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical & Computer Engineering, Michigan State University, East Lansing, MI, USA","institution_ids":["https://openalex.org/I87216513"]},{"raw_affiliation_string":"Dept. of Electr. & Comput. Eng., Michigan State Univ., East Lansing, MI, USA#TAB#","institution_ids":["https://openalex.org/I87216513"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I87216513"],"apc_list":null,"apc_paid":null,"fwci":0.2886,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.60260946,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"3438","last_page":"3441"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9986000061035156,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12611","display_name":"Neural Networks and Reservoir Computing","score":0.9879999756813049,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/video-graphics-array","display_name":"Video Graphics Array","score":0.9472110271453857},{"id":"https://openalex.org/keywords/variable-gain-amplifier","display_name":"Variable-gain amplifier","score":0.8927727937698364},{"id":"https://openalex.org/keywords/offset","display_name":"Offset (computer science)","score":0.714214563369751},{"id":"https://openalex.org/keywords/settling-time","display_name":"Settling time","score":0.6196063756942749},{"id":"https://openalex.org/keywords/automatic-gain-control","display_name":"Automatic gain control","score":0.5604685544967651},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5249649882316589},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.48283252120018005},{"id":"https://openalex.org/keywords/loop-gain","display_name":"Loop gain","score":0.43725037574768066},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.37738513946533203},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.35298943519592285},{"id":"https://openalex.org/keywords/amplifier","display_name":"Amplifier","score":0.349608838558197},{"id":"https://openalex.org/keywords/operational-amplifier","display_name":"Operational amplifier","score":0.24605217576026917},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.1979801058769226},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.15868628025054932},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.13328254222869873},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.10314127802848816},{"id":"https://openalex.org/keywords/step-response","display_name":"Step response","score":0.07273635268211365}],"concepts":[{"id":"https://openalex.org/C139983466","wikidata":"https://www.wikidata.org/wiki/Q17194","display_name":"Video Graphics Array","level":3,"score":0.9472110271453857},{"id":"https://openalex.org/C91541141","wikidata":"https://www.wikidata.org/wiki/Q1894933","display_name":"Variable-gain amplifier","level":5,"score":0.8927727937698364},{"id":"https://openalex.org/C175291020","wikidata":"https://www.wikidata.org/wiki/Q1156822","display_name":"Offset (computer science)","level":2,"score":0.714214563369751},{"id":"https://openalex.org/C14781684","wikidata":"https://www.wikidata.org/wiki/Q3983320","display_name":"Settling time","level":3,"score":0.6196063756942749},{"id":"https://openalex.org/C177502760","wikidata":"https://www.wikidata.org/wiki/Q782524","display_name":"Automatic gain control","level":4,"score":0.5604685544967651},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5249649882316589},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.48283252120018005},{"id":"https://openalex.org/C199943209","wikidata":"https://www.wikidata.org/wiki/Q1271153","display_name":"Loop gain","level":3,"score":0.43725037574768066},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.37738513946533203},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.35298943519592285},{"id":"https://openalex.org/C194257627","wikidata":"https://www.wikidata.org/wiki/Q211554","display_name":"Amplifier","level":3,"score":0.349608838558197},{"id":"https://openalex.org/C145366948","wikidata":"https://www.wikidata.org/wiki/Q178947","display_name":"Operational amplifier","level":4,"score":0.24605217576026917},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.1979801058769226},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.15868628025054932},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.13328254222869873},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.10314127802848816},{"id":"https://openalex.org/C160030872","wikidata":"https://www.wikidata.org/wiki/Q2142864","display_name":"Step response","level":2,"score":0.07273635268211365},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C133731056","wikidata":"https://www.wikidata.org/wiki/Q4917288","display_name":"Control engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas.2006.1693365","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2006.1693365","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2006 IEEE International Symposium on Circuits and Systems","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.5199999809265137,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":7,"referenced_works":["https://openalex.org/W2004943582","https://openalex.org/W2112611349","https://openalex.org/W2140823559","https://openalex.org/W2143695587","https://openalex.org/W2150131487","https://openalex.org/W2150606685","https://openalex.org/W2163247630"],"related_works":["https://openalex.org/W1585165462","https://openalex.org/W2068787209","https://openalex.org/W2113510630","https://openalex.org/W2979099941","https://openalex.org/W2543390324","https://openalex.org/W2024277841","https://openalex.org/W1875776856","https://openalex.org/W2379301173","https://openalex.org/W2039673788","https://openalex.org/W2376891207"],"abstract_inverted_index":{"Reliable":[0],"offset":[1,23,47,118],"control":[2,24],"is":[3,43],"a":[4,8,27,38,53,68,81,92,103,109],"vital":[5],"feature":[6,30],"of":[7,45,95,113],"zero-IF":[9],"variable":[10],"gain":[11,50,93,110],"amplifier":[12],"(VGA).":[13],"Many":[14],"traditional":[15],"methods":[16],"sacrifice":[17],"speed":[18],"(settling":[19],"time)":[20],"to":[21],"achieve":[22],"by":[25,76],"realizing":[26],"high":[28,82],"pass":[29,83],"in":[31,71],"the":[32,78],"signal":[33],"path.":[34],"This":[35],"paper":[36],"introduces":[37],"novel":[39],"VGA":[40,59,86],"architecture":[41],"that":[42],"capable":[44],"controlling":[46],"for":[48,80],"all":[49],"settings":[51],"with":[52,66,98],"single":[54],"offline":[55],"calibration":[56],"cycle.":[57],"The":[58,85],"realizes":[60],"very":[61],"fast":[62],"gain/startup":[63],"settling":[64,111],"time":[65,112],"only":[67],"slight":[69],"increase":[70],"power":[72],"and":[73,90,115],"area":[74],"requirements":[75],"eliminating":[77],"need":[79],"filter.":[84],"circuit":[87],"draws":[88],"3mA":[89],"has":[91,102,108],"range":[94],"0/spl":[96],"sim/42dB":[97],"1dB":[99],"steps.":[100],"It":[101],"10MHz":[104],"bandwidth":[105],"at":[106],"42dB,":[107],"140nsec,":[114],"controls":[116],"output":[117],"within":[119],"2.2mV.":[120]},"counts_by_year":[],"updated_date":"2026-06-26T08:34:08.712188","created_date":"2025-10-10T00:00:00"}
