{"id":"https://openalex.org/W1898681700","doi":"https://doi.org/10.1109/iscas.2006.1693125","title":"Process Tolerant Calibration Circuit for PLL Applications with BIST","display_name":"Process Tolerant Calibration Circuit for PLL Applications with BIST","publication_year":2006,"publication_date":"2006-09-22","ids":{"openalex":"https://openalex.org/W1898681700","doi":"https://doi.org/10.1109/iscas.2006.1693125","mag":"1898681700"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2006.1693125","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2006.1693125","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2006 IEEE International Symposium on Circuits and Systems","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5062508385","display_name":"Quentin Diduck","orcid":null},"institutions":[{"id":"https://openalex.org/I5388228","display_name":"University of Rochester","ror":"https://ror.org/022kthw22","country_code":"US","type":"education","lineage":["https://openalex.org/I5388228"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Q. Diduck","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Rochester, Rochester, NY, USA","Dept. of Electr. & Comput. Eng., Univ. of Rochester, NY, USA#TAB#"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Rochester, Rochester, NY, USA","institution_ids":["https://openalex.org/I5388228"]},{"raw_affiliation_string":"Dept. of Electr. & Comput. Eng., Univ. of Rochester, NY, USA#TAB#","institution_ids":["https://openalex.org/I5388228"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5011991523","display_name":"John Liobe","orcid":"https://orcid.org/0000-0001-7268-5991"},"institutions":[{"id":"https://openalex.org/I5388228","display_name":"University of Rochester","ror":"https://ror.org/022kthw22","country_code":"US","type":"education","lineage":["https://openalex.org/I5388228"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"J. Liobe","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Rochester, Rochester, NY, USA","Dept. of Electr. & Comput. Eng., Univ. of Rochester, NY, USA#TAB#"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Rochester, Rochester, NY, USA","institution_ids":["https://openalex.org/I5388228"]},{"raw_affiliation_string":"Dept. of Electr. & Comput. Eng., Univ. of Rochester, NY, USA#TAB#","institution_ids":["https://openalex.org/I5388228"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5034843994","display_name":"Sheikh Nijam Ali","orcid":"https://orcid.org/0000-0003-3414-6115"},"institutions":[{"id":"https://openalex.org/I5388228","display_name":"University of Rochester","ror":"https://ror.org/022kthw22","country_code":"US","type":"education","lineage":["https://openalex.org/I5388228"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"S. Ali","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Rochester, Rochester, NY, USA","Dept. of Electr. & Comput. Eng., Univ. of Rochester, NY, USA#TAB#"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Rochester, Rochester, NY, USA","institution_ids":["https://openalex.org/I5388228"]},{"raw_affiliation_string":"Dept. of Electr. & Comput. Eng., Univ. of Rochester, NY, USA#TAB#","institution_ids":["https://openalex.org/I5388228"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5062664944","display_name":"Martin Margala","orcid":"https://orcid.org/0000-0002-0034-0369"},"institutions":[{"id":"https://openalex.org/I5388228","display_name":"University of Rochester","ror":"https://ror.org/022kthw22","country_code":"US","type":"education","lineage":["https://openalex.org/I5388228"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"M. Margala","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Rochester, Rochester, NY, USA","Dept. of Electr. & Comput. Eng., Univ. of Rochester, NY, USA#TAB#"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Rochester, Rochester, NY, USA","institution_ids":["https://openalex.org/I5388228"]},{"raw_affiliation_string":"Dept. of Electr. & Comput. Eng., Univ. of Rochester, NY, USA#TAB#","institution_ids":["https://openalex.org/I5388228"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5062508385"],"corresponding_institution_ids":["https://openalex.org/I5388228"],"apc_list":null,"apc_paid":null,"fwci":0.7522,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.71675146,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"2477","last_page":"2480"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.8417993783950806},{"id":"https://openalex.org/keywords/ring-oscillator","display_name":"Ring oscillator","score":0.7977533340454102},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6426136493682861},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.6282078623771667},{"id":"https://openalex.org/keywords/calibration","display_name":"Calibration","score":0.6069017052650452},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.5335676670074463},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5280970931053162},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.500917911529541},{"id":"https://openalex.org/keywords/voltage-controlled-oscillator","display_name":"Voltage-controlled oscillator","score":0.43218228220939636},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.3985024690628052},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.33206140995025635},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.20052403211593628},{"id":"https://openalex.org/keywords/phase-noise","display_name":"Phase noise","score":0.1710764765739441},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.0810980498790741}],"concepts":[{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.8417993783950806},{"id":"https://openalex.org/C104111718","wikidata":"https://www.wikidata.org/wiki/Q2153973","display_name":"Ring oscillator","level":3,"score":0.7977533340454102},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6426136493682861},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.6282078623771667},{"id":"https://openalex.org/C165838908","wikidata":"https://www.wikidata.org/wiki/Q736777","display_name":"Calibration","level":2,"score":0.6069017052650452},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.5335676670074463},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5280970931053162},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.500917911529541},{"id":"https://openalex.org/C5291336","wikidata":"https://www.wikidata.org/wiki/Q852341","display_name":"Voltage-controlled oscillator","level":3,"score":0.43218228220939636},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.3985024690628052},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.33206140995025635},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.20052403211593628},{"id":"https://openalex.org/C89631360","wikidata":"https://www.wikidata.org/wiki/Q1428766","display_name":"Phase noise","level":2,"score":0.1710764765739441},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0810980498790741},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas.2006.1693125","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2006.1693125","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2006 IEEE International Symposium on Circuits and Systems","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.6200000047683716,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":12,"referenced_works":["https://openalex.org/W1558242838","https://openalex.org/W1564318557","https://openalex.org/W1635716266","https://openalex.org/W1963803510","https://openalex.org/W2049340954","https://openalex.org/W2110437760","https://openalex.org/W2143206889","https://openalex.org/W2160926233","https://openalex.org/W2166091379","https://openalex.org/W2178373343","https://openalex.org/W2788760024","https://openalex.org/W6685352623"],"related_works":["https://openalex.org/W2976219355","https://openalex.org/W2089131288","https://openalex.org/W1600405202","https://openalex.org/W1486070987","https://openalex.org/W3064661991","https://openalex.org/W4384502435","https://openalex.org/W2121982427","https://openalex.org/W4200332348","https://openalex.org/W1557347312","https://openalex.org/W2909296819"],"abstract_inverted_index":{"A":[0,48],"process-invariant":[1],"calibration":[2,68],"circuit,":[3],"capable":[4],"of":[5,22,51],"correcting":[6],"performance":[7],"errors":[8],"in":[9,58],"charge-pump":[10],"based":[11],"PLLs":[12],"is":[13,39,65,70],"described.":[14],"Process":[15],"variations":[16,31],"detrimentally":[17],"affect":[18],"all":[19,77],"building":[20],"blocks":[21],"standard":[23],"PLL":[24,56],"architectures.":[25],"Utilizing":[26],"a":[27,52,59],"novel":[28],"ADC,":[29],"these":[30],"are":[32],"sensed":[33],"and":[34,41,45,74],"corrected.":[35],"The":[36,67],"self-calibration":[37],"circuitry":[38,69],"non-intrusive":[40],"requires":[42],"minimal":[43],"area":[44],"power":[46],"overhead.":[47],"case":[49],"study":[50],"2.4GHz":[53],"ring":[54],"VCO-based":[55],"designed":[57],"TSMC's":[60],"0.18mum":[61],"CMOS":[62],"mixed-signal":[63],"technology":[64],"given.":[66],"able":[71],"to":[72],"sense":[73],"calibrate":[75],"under":[76,85],"four":[78],"process":[79],"corners":[80],"as":[81,83],"well":[82],"detect":[84],"high":[86],"temperature":[87],"conditions":[88]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
