{"id":"https://openalex.org/W2128704302","doi":"https://doi.org/10.1109/iscas.2006.1692833","title":"Logic Optimization for Majority Gate-Based Nanoelectronic Circuits","display_name":"Logic Optimization for Majority Gate-Based Nanoelectronic Circuits","publication_year":2006,"publication_date":"2006-09-22","ids":{"openalex":"https://openalex.org/W2128704302","doi":"https://doi.org/10.1109/iscas.2006.1692833","mag":"2128704302"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2006.1692833","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2006.1692833","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2006 IEEE International Symposium on Circuits and Systems","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5007137233","display_name":"Zhi Huo","orcid":null},"institutions":[{"id":"https://openalex.org/I82880672","display_name":"Beihang University","ror":"https://ror.org/00wk2mp56","country_code":"CN","type":"education","lineage":["https://openalex.org/I82880672"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Zhi Huo","raw_affiliation_strings":["School of Electrical & Information Engineering, BeiHang University, Beijing, China","Sch. of Electr. & Inf. Eng., Beihang Univ., Beijing, China"],"affiliations":[{"raw_affiliation_string":"School of Electrical & Information Engineering, BeiHang University, Beijing, China","institution_ids":["https://openalex.org/I82880672"]},{"raw_affiliation_string":"Sch. of Electr. & Inf. Eng., Beihang Univ., Beijing, China","institution_ids":["https://openalex.org/I82880672"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101895442","display_name":"Qishan Zhang","orcid":null},"institutions":[{"id":"https://openalex.org/I82880672","display_name":"Beihang University","ror":"https://ror.org/00wk2mp56","country_code":"CN","type":"education","lineage":["https://openalex.org/I82880672"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Qishan Zhang","raw_affiliation_strings":["School of Electrical & Information Engineering, BeiHang University, Beijing, China","Sch. of Electr. & Inf. Eng., Beihang Univ., Beijing, China"],"affiliations":[{"raw_affiliation_string":"School of Electrical & Information Engineering, BeiHang University, Beijing, China","institution_ids":["https://openalex.org/I82880672"]},{"raw_affiliation_string":"Sch. of Electr. & Inf. Eng., Beihang Univ., Beijing, China","institution_ids":["https://openalex.org/I82880672"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5075839686","display_name":"S. Haruehanroengra","orcid":null},"institutions":[{"id":"https://openalex.org/I135191193","display_name":"University of Indianapolis","ror":"https://ror.org/052133d12","country_code":"US","type":"education","lineage":["https://openalex.org/I135191193"]},{"id":"https://openalex.org/I55769427","display_name":"Indiana University \u2013 Purdue University Indianapolis","ror":"https://ror.org/05gxnyn08","country_code":"US","type":"education","lineage":["https://openalex.org/I55769427","https://openalex.org/I592451"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"S. Haruehanroengra","raw_affiliation_strings":["Department of Electrical & Computer Engineering, Indiana University-Purdue University Indianapolis, Indianapolis, IN, USA","Department of Electrical and Computer Engineering , Indiana University\u2013Purdue University Indianapolis , Indianapolis, IN , USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical & Computer Engineering, Indiana University-Purdue University Indianapolis, Indianapolis, IN, USA","institution_ids":["https://openalex.org/I135191193","https://openalex.org/I55769427"]},{"raw_affiliation_string":"Department of Electrical and Computer Engineering , Indiana University\u2013Purdue University Indianapolis , Indianapolis, IN , USA","institution_ids":["https://openalex.org/I55769427"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100400429","display_name":"Wei Wang","orcid":"https://orcid.org/0000-0002-4441-8914"},"institutions":[{"id":"https://openalex.org/I55769427","display_name":"Indiana University \u2013 Purdue University Indianapolis","ror":"https://ror.org/05gxnyn08","country_code":"US","type":"education","lineage":["https://openalex.org/I55769427","https://openalex.org/I592451"]},{"id":"https://openalex.org/I135191193","display_name":"University of Indianapolis","ror":"https://ror.org/052133d12","country_code":"US","type":"education","lineage":["https://openalex.org/I135191193"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Wei Wang","raw_affiliation_strings":["Department of Electrical & Computer Engineering, Indiana University-Purdue University Indianapolis, Indianapolis, IN, USA","Department of Electrical and Computer Engineering , Indiana University\u2013Purdue University Indianapolis , Indianapolis, IN , USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical & Computer Engineering, Indiana University-Purdue University Indianapolis, Indianapolis, IN, USA","institution_ids":["https://openalex.org/I135191193","https://openalex.org/I55769427"]},{"raw_affiliation_string":"Department of Electrical and Computer Engineering , Indiana University\u2013Purdue University Indianapolis , Indianapolis, IN , USA","institution_ids":["https://openalex.org/I55769427"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5007137233"],"corresponding_institution_ids":["https://openalex.org/I82880672"],"apc_list":null,"apc_paid":null,"fwci":2.6161,"has_fulltext":false,"cited_by_count":50,"citation_normalized_percentile":{"value":0.89905231,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"1307","last_page":"1310"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T13182","display_name":"Quantum-Dot Cellular Automata","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T13182","display_name":"Quantum-Dot Cellular Automata","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9983000159263611,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9980000257492065,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.680263876914978},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.6434590220451355},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5949245691299438},{"id":"https://openalex.org/keywords/quantum-dot-cellular-automaton","display_name":"Quantum dot cellular automaton","score":0.5885542631149292},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5108239650726318},{"id":"https://openalex.org/keywords/cellular-automaton","display_name":"Cellular automaton","score":0.49627190828323364},{"id":"https://openalex.org/keywords/quantum-tunnelling","display_name":"Quantum tunnelling","score":0.47961387038230896},{"id":"https://openalex.org/keywords/logic-optimization","display_name":"Logic optimization","score":0.4734613299369812},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.4557177722454071},{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.4537492096424103},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.38012078404426575},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.30816787481307983},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1936539113521576},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.1842643916606903},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.17423373460769653},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.17053526639938354},{"id":"https://openalex.org/keywords/optoelectronics","display_name":"Optoelectronics","score":0.14604750275611877}],"concepts":[{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.680263876914978},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.6434590220451355},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5949245691299438},{"id":"https://openalex.org/C116523029","wikidata":"https://www.wikidata.org/wiki/Q7269040","display_name":"Quantum dot cellular automaton","level":3,"score":0.5885542631149292},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5108239650726318},{"id":"https://openalex.org/C35527583","wikidata":"https://www.wikidata.org/wiki/Q189156","display_name":"Cellular automaton","level":2,"score":0.49627190828323364},{"id":"https://openalex.org/C120398109","wikidata":"https://www.wikidata.org/wiki/Q175751","display_name":"Quantum tunnelling","level":2,"score":0.47961387038230896},{"id":"https://openalex.org/C28449271","wikidata":"https://www.wikidata.org/wiki/Q6667469","display_name":"Logic optimization","level":4,"score":0.4734613299369812},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.4557177722454071},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.4537492096424103},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.38012078404426575},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.30816787481307983},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1936539113521576},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.1842643916606903},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.17423373460769653},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.17053526639938354},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.14604750275611877},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas.2006.1692833","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2006.1692833","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2006 IEEE International Symposium on Circuits and Systems","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.6299999952316284,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W1879281873","https://openalex.org/W1987200288","https://openalex.org/W2105234435","https://openalex.org/W2132257242","https://openalex.org/W2138040286","https://openalex.org/W2162433640","https://openalex.org/W2165354638","https://openalex.org/W2535844537","https://openalex.org/W4237060324"],"related_works":["https://openalex.org/W4281558578","https://openalex.org/W1966764473","https://openalex.org/W2098419840","https://openalex.org/W2789349722","https://openalex.org/W2121963733","https://openalex.org/W4318684523","https://openalex.org/W2766377030","https://openalex.org/W1977171228","https://openalex.org/W2170504327","https://openalex.org/W2102927888"],"abstract_inverted_index":{"In":[0],"this":[1],"paper,":[2],"an":[3],"efficient":[4],"majority":[5,12],"logic":[6],"optimizer":[7,61],"is":[8,22],"proposed":[9,23,44,60],"to":[10,24,39,48],"synthesize":[11],"gate-based":[13],"nanoelectronic":[14],"circuits.":[15],"A":[16],"novel":[17],"sharing":[18],"and":[19,29,54,73],"mapping":[20],"scheme":[21],"achieve":[25],"simple":[26],"synthesized":[27],"circuits":[28],"high":[30],"synthesis":[31,57],"speed.":[32,58],"The":[33],"experimental":[34],"results":[35],"show":[36],"that":[37],"compared":[38],"the":[40,43],"existing":[41],"method,":[42],"method":[45],"achieves":[46],"up":[47],"20%":[49],"reduction":[50],"of":[51],"gate":[52],"counts":[53],"25%":[55],"higher":[56],"This":[59],"can":[62],"be":[63],"widely":[64],"used":[65],"in":[66],"quantum":[67],"cellular":[68],"automata,":[69],"tunneling":[70,76],"phase":[71],"logic,":[72],"single":[74],"electron":[75],"circuit":[77],"design":[78]},"counts_by_year":[{"year":2021,"cited_by_count":3},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":4},{"year":2018,"cited_by_count":2},{"year":2017,"cited_by_count":4},{"year":2016,"cited_by_count":3},{"year":2015,"cited_by_count":7},{"year":2014,"cited_by_count":5},{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":7}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
