{"id":"https://openalex.org/W2155290730","doi":"https://doi.org/10.1109/iscas.2006.1692708","title":"System-level verification on high-level synthesis of dataflow graph","display_name":"System-level verification on high-level synthesis of dataflow graph","publication_year":2006,"publication_date":"2006-09-22","ids":{"openalex":"https://openalex.org/W2155290730","doi":"https://doi.org/10.1109/iscas.2006.1692708","mag":"2155290730"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2006.1692708","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2006.1692708","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2006 IEEE International Symposium on Circuits and Systems","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5074578031","display_name":"Tsung-Hsi Chiang","orcid":null},"institutions":[{"id":"https://openalex.org/I148366613","display_name":"National Yang Ming Chiao Tung University","ror":"https://ror.org/00se2k293","country_code":"TW","type":"education","lineage":["https://openalex.org/I148366613"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Tsung-Hsi Chiang","raw_affiliation_strings":["Department of Electrical and Control Engineering, National Chiao Tung University, Hsinchu, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Control Engineering, National Chiao Tung University, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I148366613"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5053658433","display_name":"Lan-Rong Dung","orcid":"https://orcid.org/0000-0002-7231-7029"},"institutions":[{"id":"https://openalex.org/I148366613","display_name":"National Yang Ming Chiao Tung University","ror":"https://ror.org/00se2k293","country_code":"TW","type":"education","lineage":["https://openalex.org/I148366613"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Lan-Rong Dung","raw_affiliation_strings":["Department of Electrical and Control Engineering, National Chiao Tung University, Hsinchu, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Control Engineering, National Chiao Tung University, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I148366613"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I148366613"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.19455757,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"4","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10142","display_name":"Formal Methods in Verification","score":0.9986000061035156,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9973000288009644,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/dataflow","display_name":"Dataflow","score":0.9409082531929016},{"id":"https://openalex.org/keywords/correctness","display_name":"Correctness","score":0.8501509428024292},{"id":"https://openalex.org/keywords/petri-net","display_name":"Petri net","score":0.8332861661911011},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8226350545883179},{"id":"https://openalex.org/keywords/high-level-synthesis","display_name":"High-level synthesis","score":0.7967044115066528},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.49225369095802307},{"id":"https://openalex.org/keywords/scheduling","display_name":"Scheduling (production processes)","score":0.4685576558113098},{"id":"https://openalex.org/keywords/graph","display_name":"Graph","score":0.4556465744972229},{"id":"https://openalex.org/keywords/graph-rewriting","display_name":"Graph rewriting","score":0.43498626351356506},{"id":"https://openalex.org/keywords/formal-verification","display_name":"Formal verification","score":0.41285863518714905},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.3698056936264038},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.19043609499931335},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.179942786693573}],"concepts":[{"id":"https://openalex.org/C96324660","wikidata":"https://www.wikidata.org/wiki/Q205446","display_name":"Dataflow","level":2,"score":0.9409082531929016},{"id":"https://openalex.org/C55439883","wikidata":"https://www.wikidata.org/wiki/Q360812","display_name":"Correctness","level":2,"score":0.8501509428024292},{"id":"https://openalex.org/C38677869","wikidata":"https://www.wikidata.org/wiki/Q724168","display_name":"Petri net","level":2,"score":0.8332861661911011},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8226350545883179},{"id":"https://openalex.org/C58013763","wikidata":"https://www.wikidata.org/wiki/Q5754574","display_name":"High-level synthesis","level":3,"score":0.7967044115066528},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.49225369095802307},{"id":"https://openalex.org/C206729178","wikidata":"https://www.wikidata.org/wiki/Q2271896","display_name":"Scheduling (production processes)","level":2,"score":0.4685576558113098},{"id":"https://openalex.org/C132525143","wikidata":"https://www.wikidata.org/wiki/Q141488","display_name":"Graph","level":2,"score":0.4556465744972229},{"id":"https://openalex.org/C558772884","wikidata":"https://www.wikidata.org/wiki/Q1508564","display_name":"Graph rewriting","level":3,"score":0.43498626351356506},{"id":"https://openalex.org/C111498074","wikidata":"https://www.wikidata.org/wiki/Q173326","display_name":"Formal verification","level":2,"score":0.41285863518714905},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.3698056936264038},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.19043609499931335},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.179942786693573},{"id":"https://openalex.org/C21547014","wikidata":"https://www.wikidata.org/wiki/Q1423657","display_name":"Operations management","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas.2006.1692708","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2006.1692708","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2006 IEEE International Symposium on Circuits and Systems","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Decent work and economic growth","score":0.4300000071525574,"id":"https://metadata.un.org/sdg/8"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":6,"referenced_works":["https://openalex.org/W1515231954","https://openalex.org/W2099736035","https://openalex.org/W2101129050","https://openalex.org/W2106417701","https://openalex.org/W2108177812","https://openalex.org/W4237568262"],"related_works":["https://openalex.org/W2293118914","https://openalex.org/W2998381397","https://openalex.org/W4236419692","https://openalex.org/W3167919718","https://openalex.org/W4251718783","https://openalex.org/W2171015181","https://openalex.org/W4239447582","https://openalex.org/W2461217932","https://openalex.org/W3206653210","https://openalex.org/W2165304220"],"abstract_inverted_index":{"This":[0],"paper":[1,80],"presents":[2],"a":[3,24,28,53],"system-level":[4],"verification":[5,106],"algorithm":[6,107],"using":[7],"the":[8,33,41,47,58,82,88,91,101,110,115],"Petri":[9,83,102],"net":[10,84,103],"theory":[11,85],"to":[12,45,86,99],"detect":[13],"design":[14],"errors":[15],"for":[16,66,71],"high-level":[17,34,50,72],"synthesis":[18,35,51,59,92],"of":[19,30,49,75,90,119],"dataflow":[20,25],"graphs.":[21],"Typically,":[22],"given":[23],"graph":[26],"and":[27,39,108,122],"set":[29],"architectural":[31],"constraints,":[32],"performs":[36],"algorithmic":[37],"transformation":[38],"produces":[40],"optimal":[42],"scheduling.":[43],"How":[44],"verify":[46,87],"correctness":[48,89],"becomes":[52],"key":[54],"issue":[55],"before":[56],"mapping":[57],"results":[60],"onto":[61],"silicon.":[62],"Many":[63],"tools":[64],"exist":[65],"RTL":[67],"design,":[68],"but":[69],"few":[70],"synthesis.":[73],"Instead":[74],"applying":[76],"Boolean":[77],"algebra,":[78],"this":[79],"adopts":[81],"result.":[93],"Herein,":[94],"we":[95],"propose":[96],"three":[97],"approaches":[98],"realize":[100],"based":[104],"formal":[105],"identify":[109],"best":[111],"one":[112],"that":[113],"outperforms":[114],"others":[116],"in":[117],"terms":[118],"processing":[120],"speed":[121],"resource":[123],"usage.":[124]},"counts_by_year":[],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
