{"id":"https://openalex.org/W1904025867","doi":"https://doi.org/10.1109/iscas.2006.1692587","title":"Average lengths of wire routing under M-architecture and X-architecture","display_name":"Average lengths of wire routing under M-architecture and X-architecture","publication_year":2006,"publication_date":"2006-09-22","ids":{"openalex":"https://openalex.org/W1904025867","doi":"https://doi.org/10.1109/iscas.2006.1692587","mag":"1904025867"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2006.1692587","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2006.1692587","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2006 IEEE International Symposium on Circuits and Systems","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5013468570","display_name":"Songpu Shang","orcid":null},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"S.P. Shang","raw_affiliation_strings":["Institute of Applied Mathematics, Chinese Academy and Sciences, Beijing, China"],"affiliations":[{"raw_affiliation_string":"Institute of Applied Mathematics, Chinese Academy and Sciences, Beijing, China","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5050750924","display_name":"Xiao Hu","orcid":"https://orcid.org/0000-0003-1128-4099"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"X.-D. Hu","raw_affiliation_strings":["Institute of Applied Mathematics, Chinese Academy and Sciences, Beijing, China"],"affiliations":[{"raw_affiliation_string":"Institute of Applied Mathematics, Chinese Academy and Sciences, Beijing, China","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5101738220","display_name":"Jing Tong","orcid":"https://orcid.org/0000-0002-0607-0179"},"institutions":[{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Tong Jing","raw_affiliation_strings":["Department of Computer Science and Technology, Tsinghua University, Beijing, China"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Technology, Tsinghua University, Beijing, China","institution_ids":["https://openalex.org/I99065089"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5013468570"],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.0616892,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"16","issue":null,"first_page":"4","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.7688310146331787},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.7251281142234802},{"id":"https://openalex.org/keywords/diagonal","display_name":"Diagonal","score":0.7036617994308472},{"id":"https://openalex.org/keywords/routing","display_name":"Routing (electronic design automation)","score":0.6975722908973694},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5407663583755493},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.41105154156684875},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3713628053665161},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3403768539428711},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.33086106181144714},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.3048931360244751},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2580421268939972},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.23412317037582397},{"id":"https://openalex.org/keywords/geometry","display_name":"Geometry","score":0.2136906087398529}],"concepts":[{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.7688310146331787},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.7251281142234802},{"id":"https://openalex.org/C130367717","wikidata":"https://www.wikidata.org/wiki/Q189791","display_name":"Diagonal","level":2,"score":0.7036617994308472},{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.6975722908973694},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5407663583755493},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.41105154156684875},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3713628053665161},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3403768539428711},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.33086106181144714},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.3048931360244751},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2580421268939972},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.23412317037582397},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.2136906087398529},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/iscas.2006.1692587","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2006.1692587","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2006 IEEE International Symposium on Circuits and Systems","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.93.3292","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.93.3292","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.ee.ucla.edu/~tomjing/TJing-ConfPapers/C27-ISCAS2006-1218-SPShang-MX.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Sustainable cities and communities","score":0.7300000190734863,"id":"https://metadata.un.org/sdg/11"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":19,"referenced_works":["https://openalex.org/W55191700","https://openalex.org/W1504319242","https://openalex.org/W1504592363","https://openalex.org/W1839012397","https://openalex.org/W2002544351","https://openalex.org/W2020112047","https://openalex.org/W2026652758","https://openalex.org/W2058312407","https://openalex.org/W2064086982","https://openalex.org/W2078144752","https://openalex.org/W2080879057","https://openalex.org/W2108210698","https://openalex.org/W2139311061","https://openalex.org/W2143037347","https://openalex.org/W2161510970","https://openalex.org/W4232765531","https://openalex.org/W4244590348","https://openalex.org/W4256411528","https://openalex.org/W6656951991"],"related_works":["https://openalex.org/W2135584473","https://openalex.org/W2964223869","https://openalex.org/W2792539140","https://openalex.org/W2005808740","https://openalex.org/W2295130398","https://openalex.org/W2064951085","https://openalex.org/W2626141450","https://openalex.org/W2810740133","https://openalex.org/W2064919237","https://openalex.org/W4302055909"],"abstract_inverted_index":{"The":[0,35],"X-architecture":[1,41,148],"is":[2,26,105],"a":[3,43,61],"new":[4],"integrated-circuit":[5],"wiring":[6],"technique":[7],"in":[8],"the":[9,14,29,40,65,78,90,100,117,126,135,141],"physical":[10],"design.":[11],"Compared":[12],"with":[13],"currently":[15],"used":[16],"M-architecture,":[17],"which":[18],"uses":[19],"either":[20],"horizontal":[21],"or":[22],"vertical":[23],"routing,":[24],"it":[25],"based":[27],"on":[28,64,140],"pervasive":[30],"use":[31],"of":[32,47,54,80,128,145,152],"diagonal":[33],"wires.":[34],"experimental":[36,96],"studies":[37,97],"show":[38],"that":[39,116],"demonstrates":[42],"wire":[44,66,91,118,143],"length":[45,92,119],"reduction":[46,93,101,120],"more":[48],"than":[49],"10-20%":[50],"and":[51,72,82,137,147],"better":[52],"performance":[53],"timing.":[55],"In":[56],"this":[57],"paper,":[58],"we":[59],"make":[60],"theoretical":[62,87],"study":[63,88],"lengths":[67,144],"under":[68],"these":[69],"two":[70,81,111],"architectures":[71],"obtain":[73],"their":[74],"expected":[75,142],"values":[76],"for":[77,102,110,149],"cases":[79],"three":[83,103],"terminals,":[84],"respectively.":[85],"Our":[86,113],"confirms":[89],"as":[94,107,109,125],"previous":[95],"claimed,":[98],"but":[99],"terminals":[104,129],"not":[106],"significant":[108],"terminals.":[112,153],"analysis":[114],"shows":[115],"tends":[121],"to":[122],"become":[123],"smaller":[124],"number":[127,151],"turns":[130],"larger.":[131],"We":[132],"also":[133],"estimate":[134],"lower":[136],"upper":[138],"bounds":[139],"M-architecture":[146],"arbitrary":[150]},"counts_by_year":[],"updated_date":"2026-04-05T17:49:38.594831","created_date":"2025-10-10T00:00:00"}
