{"id":"https://openalex.org/W2168057552","doi":"https://doi.org/10.1109/iscas.2005.1466056","title":"An 800Mbps System Interconnect Modeling and Simulation for High Speed Computing","display_name":"An 800Mbps System Interconnect Modeling and Simulation for High Speed Computing","publication_year":2005,"publication_date":"2005-07-27","ids":{"openalex":"https://openalex.org/W2168057552","doi":"https://doi.org/10.1109/iscas.2005.1466056","mag":"2168057552"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2005.1466056","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2005.1466056","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2005 IEEE International Symposium on Circuits and Systems","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5020241081","display_name":"Mohammad S. Sharawi","orcid":"https://orcid.org/0000-0003-4450-8212"},"institutions":[{"id":"https://openalex.org/I177721651","display_name":"Oakland University","ror":"https://ror.org/01ythxj32","country_code":"US","type":"education","lineage":["https://openalex.org/I177721651"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"M.S. Sharawi","raw_affiliation_strings":["Electrical and System Engineering, Oakland University, Rochester, MI, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Electrical and System Engineering, Oakland University, Rochester, MI, USA","institution_ids":["https://openalex.org/I177721651"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5071532529","display_name":"Daniel N. Aloi","orcid":"https://orcid.org/0000-0003-1336-8675"},"institutions":[{"id":"https://openalex.org/I177721651","display_name":"Oakland University","ror":"https://ror.org/01ythxj32","country_code":"US","type":"education","lineage":["https://openalex.org/I177721651"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"D.N. Aloi","raw_affiliation_strings":["Electrical and System Engineering, Oakland University, Rochester, MI, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Electrical and System Engineering, Oakland University, Rochester, MI, USA","institution_ids":["https://openalex.org/I177721651"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.7269,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.76303695,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"6198","last_page":"6201"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11444","display_name":"Electromagnetic Compatibility and Noise Suppression","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/bottleneck","display_name":"Bottleneck","score":0.7034310698509216},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.6986644268035889},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6880878210067749},{"id":"https://openalex.org/keywords/solver","display_name":"Solver","score":0.6252432465553284},{"id":"https://openalex.org/keywords/spice","display_name":"Spice","score":0.5758854746818542},{"id":"https://openalex.org/keywords/megabit","display_name":"Megabit","score":0.5729398131370544},{"id":"https://openalex.org/keywords/modeling-and-simulation","display_name":"Modeling and simulation","score":0.5607107877731323},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.512407124042511},{"id":"https://openalex.org/keywords/data-transmission","display_name":"Data transmission","score":0.5091246962547302},{"id":"https://openalex.org/keywords/ibm","display_name":"IBM","score":0.4846363663673401},{"id":"https://openalex.org/keywords/transmission-line","display_name":"Transmission line","score":0.43309712409973145},{"id":"https://openalex.org/keywords/simulation","display_name":"Simulation","score":0.3960467278957367},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.38178980350494385},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.32890528440475464},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.2688955068588257},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.22906029224395752},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.1127420961856842},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.07947483658790588}],"concepts":[{"id":"https://openalex.org/C2780513914","wikidata":"https://www.wikidata.org/wiki/Q18210350","display_name":"Bottleneck","level":2,"score":0.7034310698509216},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.6986644268035889},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6880878210067749},{"id":"https://openalex.org/C2778770139","wikidata":"https://www.wikidata.org/wiki/Q1966904","display_name":"Solver","level":2,"score":0.6252432465553284},{"id":"https://openalex.org/C2780077345","wikidata":"https://www.wikidata.org/wiki/Q16891888","display_name":"Spice","level":2,"score":0.5758854746818542},{"id":"https://openalex.org/C185177783","wikidata":"https://www.wikidata.org/wiki/Q3332814","display_name":"Megabit","level":2,"score":0.5729398131370544},{"id":"https://openalex.org/C167343916","wikidata":"https://www.wikidata.org/wiki/Q6888384","display_name":"Modeling and simulation","level":2,"score":0.5607107877731323},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.512407124042511},{"id":"https://openalex.org/C557945733","wikidata":"https://www.wikidata.org/wiki/Q389772","display_name":"Data transmission","level":2,"score":0.5091246962547302},{"id":"https://openalex.org/C70388272","wikidata":"https://www.wikidata.org/wiki/Q5968558","display_name":"IBM","level":2,"score":0.4846363663673401},{"id":"https://openalex.org/C33441834","wikidata":"https://www.wikidata.org/wiki/Q693004","display_name":"Transmission line","level":2,"score":0.43309712409973145},{"id":"https://openalex.org/C44154836","wikidata":"https://www.wikidata.org/wiki/Q45045","display_name":"Simulation","level":1,"score":0.3960467278957367},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.38178980350494385},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.32890528440475464},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.2688955068588257},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.22906029224395752},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.1127420961856842},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.07947483658790588},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.0},{"id":"https://openalex.org/C120665830","wikidata":"https://www.wikidata.org/wiki/Q14620","display_name":"Optics","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/iscas.2005.1466056","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2005.1466056","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2005 IEEE International Symposium on Circuits and Systems","raw_type":"proceedings-article"},{"id":"pmh:oai:publications.polymtl.ca:42115","is_oa":false,"landing_page_url":"https://publications.polymtl.ca/42115/","pdf_url":null,"source":{"id":"https://openalex.org/S4306401013","display_name":"PolyPublie (\u00c9cole Polytechnique de Montr\u00e9al)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I45683168","host_organization_name":"Polytechnique Montr\u00e9al","host_organization_lineage":["https://openalex.org/I45683168"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"Communication de conf\u00e9rence"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.6100000143051147,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":6,"referenced_works":["https://openalex.org/W1546460110","https://openalex.org/W1556480701","https://openalex.org/W1557628067","https://openalex.org/W2089414099","https://openalex.org/W6632657969","https://openalex.org/W7067720825"],"related_works":["https://openalex.org/W2204879205","https://openalex.org/W2096437374","https://openalex.org/W1943174035","https://openalex.org/W1928481607","https://openalex.org/W2064744906","https://openalex.org/W2112143554","https://openalex.org/W2379865744","https://openalex.org/W2352918229","https://openalex.org/W2039934420","https://openalex.org/W1985746445"],"abstract_inverted_index":{"System":[0],"interconnect":[1,77],"modeling":[2,19,39,112],"for":[3,11,67,87],"high":[4,12,23],"speed":[5,13,24],"systems":[6],"is":[7],"a":[8,22,49,59,100,119],"vital":[9],"bottleneck":[10],"data":[14],"transfer.":[15],"We":[16],"demonstrate":[17],"the":[18,41,44,75,83,88,93,104,108],"process":[20],"on":[21,43],"computer":[25],"differential":[26],"net":[27,90],"running":[28,121],"at":[29,122],"400":[30],"MHz":[31],"(800":[32],"Mbit/s)":[33],"with":[34],"IBM":[35],"I/O":[36],"cells.":[37],"The":[38,52,70],"of":[40,74],"traces":[42],"boards":[45],"was":[46,79,95],"done":[47],"using":[48],"field":[50],"solver.":[51],"transmission":[53],"line":[54],"matrices":[55],"were":[56,65],"used":[57],"in":[58,92],"SPICE":[60],"model,":[61],"and":[62,107],"3-simulation":[63],"scenarios":[64],"tested":[66],"this":[68],"model.":[69],"obtained":[71],"EYE":[72,85],"opening":[73,86],"modeled":[76],"simulation":[78],"705":[80],"mV":[81],"while":[82],"measured":[84],"same":[89],"topology":[91],"laboratory":[94],"710":[96],"mV.":[97],"This":[98],"shows":[99],"close":[101],"match":[102],"between":[103],"actual":[105],"behavior":[106],"model":[109],"generated.":[110],"Careful":[111],"can":[113],"be":[114],"very":[115],"beneficial":[116],"to":[117],"get":[118],"design":[120],"first":[123],"time":[124],"operation.":[125]},"counts_by_year":[],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
