{"id":"https://openalex.org/W2143032881","doi":"https://doi.org/10.1109/iscas.2005.1466011","title":"High-Speed and Low-Power Design of Parallel Turbo Decoder","display_name":"High-Speed and Low-Power Design of Parallel Turbo Decoder","publication_year":2005,"publication_date":"2005-07-27","ids":{"openalex":"https://openalex.org/W2143032881","doi":"https://doi.org/10.1109/iscas.2005.1466011","mag":"2143032881"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2005.1466011","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2005.1466011","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2005 IEEE International Symposium on Circuits and Systems","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100334005","display_name":"Zhiyong He","orcid":"https://orcid.org/0000-0002-7041-8934"},"institutions":[{"id":"https://openalex.org/I43406934","display_name":"Universit\u00e9 Laval","ror":"https://ror.org/04sjchr03","country_code":"CA","type":"education","lineage":["https://openalex.org/I43406934"]}],"countries":["CA"],"is_corresponding":true,"raw_author_name":"Zhiyong He","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Laval University, Sainte Foy, QUE, Canada","[Dept. of Electr. & Comput. Eng., Laval Univ., Que., Canada]"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Laval University, Sainte Foy, QUE, Canada","institution_ids":["https://openalex.org/I43406934"]},{"raw_affiliation_string":"[Dept. of Electr. & Comput. Eng., Laval Univ., Que., Canada]","institution_ids":["https://openalex.org/I43406934"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5062938524","display_name":"S\u00e9bastien Roy","orcid":"https://orcid.org/0000-0002-1262-9485"},"institutions":[{"id":"https://openalex.org/I43406934","display_name":"Universit\u00e9 Laval","ror":"https://ror.org/04sjchr03","country_code":"CA","type":"education","lineage":["https://openalex.org/I43406934"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"S. Roy","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Laval University, Sainte Foy, QUE, Canada","[Dept. of Electr. & Comput. Eng., Laval Univ., Que., Canada]"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Laval University, Sainte Foy, QUE, Canada","institution_ids":["https://openalex.org/I43406934"]},{"raw_affiliation_string":"[Dept. of Electr. & Comput. Eng., Laval Univ., Que., Canada]","institution_ids":["https://openalex.org/I43406934"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5071953487","display_name":"Paul Fortier","orcid":"https://orcid.org/0000-0001-7368-9484"},"institutions":[{"id":"https://openalex.org/I43406934","display_name":"Universit\u00e9 Laval","ror":"https://ror.org/04sjchr03","country_code":"CA","type":"education","lineage":["https://openalex.org/I43406934"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"P. Fortier","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Laval University, Sainte Foy, QUE, Canada","[Dept. of Electr. & Comput. Eng., Laval Univ., Que., Canada]"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Laval University, Sainte Foy, QUE, Canada","institution_ids":["https://openalex.org/I43406934"]},{"raw_affiliation_string":"[Dept. of Electr. & Comput. Eng., Laval Univ., Que., Canada]","institution_ids":["https://openalex.org/I43406934"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5100334005"],"corresponding_institution_ids":["https://openalex.org/I43406934"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.20164179,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"4","issue":null,"first_page":"6018","last_page":"6021"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10125","display_name":"Advanced Wireless Communication Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10125","display_name":"Advanced Wireless Communication Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11321","display_name":"Error Correcting Code Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11269","display_name":"Algorithms and Data Compression","score":0.9979000091552734,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.828520655632019},{"id":"https://openalex.org/keywords/decoding-methods","display_name":"Decoding methods","score":0.7056150436401367},{"id":"https://openalex.org/keywords/soft-decision-decoder","display_name":"Soft-decision decoder","score":0.6915785074234009},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.6809009909629822},{"id":"https://openalex.org/keywords/truncation","display_name":"Truncation (statistics)","score":0.5287349224090576},{"id":"https://openalex.org/keywords/speedup","display_name":"Speedup","score":0.5082123279571533},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.4754323959350586},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.47214439511299133},{"id":"https://openalex.org/keywords/memory-architecture","display_name":"Memory architecture","score":0.47001269459724426},{"id":"https://openalex.org/keywords/path","display_name":"Path (computing)","score":0.43271690607070923},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.34600743651390076},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.1533050537109375},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.12253037095069885}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.828520655632019},{"id":"https://openalex.org/C57273362","wikidata":"https://www.wikidata.org/wiki/Q576722","display_name":"Decoding methods","level":2,"score":0.7056150436401367},{"id":"https://openalex.org/C185588885","wikidata":"https://www.wikidata.org/wiki/Q7553811","display_name":"Soft-decision decoder","level":3,"score":0.6915785074234009},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.6809009909629822},{"id":"https://openalex.org/C106195933","wikidata":"https://www.wikidata.org/wiki/Q7847935","display_name":"Truncation (statistics)","level":2,"score":0.5287349224090576},{"id":"https://openalex.org/C68339613","wikidata":"https://www.wikidata.org/wiki/Q1549489","display_name":"Speedup","level":2,"score":0.5082123279571533},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.4754323959350586},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.47214439511299133},{"id":"https://openalex.org/C2779602883","wikidata":"https://www.wikidata.org/wiki/Q15544750","display_name":"Memory architecture","level":2,"score":0.47001269459724426},{"id":"https://openalex.org/C2777735758","wikidata":"https://www.wikidata.org/wiki/Q817765","display_name":"Path (computing)","level":2,"score":0.43271690607070923},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.34600743651390076},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.1533050537109375},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.12253037095069885},{"id":"https://openalex.org/C119857082","wikidata":"https://www.wikidata.org/wiki/Q2539","display_name":"Machine learning","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas.2005.1466011","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2005.1466011","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2005 IEEE International Symposium on Circuits and Systems","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8999999761581421,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W1843100810","https://openalex.org/W1964471164","https://openalex.org/W2048804570","https://openalex.org/W2050939415","https://openalex.org/W2092136075","https://openalex.org/W2119678386","https://openalex.org/W2121606987","https://openalex.org/W2128072526","https://openalex.org/W2139292497","https://openalex.org/W2139391892","https://openalex.org/W2160466075","https://openalex.org/W2172271623","https://openalex.org/W2987657883","https://openalex.org/W6680691631","https://openalex.org/W6683962844"],"related_works":["https://openalex.org/W2154078079","https://openalex.org/W4244085088","https://openalex.org/W406587413","https://openalex.org/W2141913236","https://openalex.org/W2889372359","https://openalex.org/W2148484519","https://openalex.org/W2590897469","https://openalex.org/W2391909979","https://openalex.org/W1967516765","https://openalex.org/W1646009337"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"the":[3,19,43,47,51,81,85,98,102,118],"high":[4,63],"speed":[5,64,72],"and":[6,105],"low":[7],"power":[8,82,119],"design":[9],"of":[10,23,84,101],"a":[11,30,38,54,76,90],"turbo":[12],"decoder":[13,86],"with":[14,87,121],"parallel":[15,28,40,48,56,68,88],"architecture.":[16],"To":[17,79],"solve":[18],"memory":[20],"conflict":[21],"problem":[22],"extrinsic":[24,103],"information":[25,104],"in":[26,46],"such":[27],"architectures,":[29],"two-level":[31],"mapping":[32],"approach":[33,93,116],"is":[34,60,94],"proposed":[35,61,67,95,114],"for":[36,62,75],"designing":[37],"collision-free":[39],"interleaver.":[41],"Since":[42],"warm-up":[44,59],"process":[45],"architecture":[49,57,69],"increases":[50,70],"decoding":[52,71],"delay,":[53],"new":[55],"without":[58,108],"applications.":[65],"The":[66,113],"by":[73],"6-50%":[74],"16-parallel":[77],"decoder.":[78],"reduce":[80,97],"consumption":[83,120],"architecture,":[89],"simple":[91],"truncation":[92,115],"to":[96],"storage":[99],"requirement":[100],"path":[106],"metrics":[107],"any":[109],"extra":[110],"hardware":[111],"cost.":[112],"reduces":[117],"little":[122],"performance":[123],"degradation.":[124]},"counts_by_year":[{"year":2013,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}