{"id":"https://openalex.org/W2109824002","doi":"https://doi.org/10.1109/iscas.2005.1465972","title":"Coupling Reduction Analysis of Bus-Invert Coding","display_name":"Coupling Reduction Analysis of Bus-Invert Coding","publication_year":2005,"publication_date":"2005-07-27","ids":{"openalex":"https://openalex.org/W2109824002","doi":"https://doi.org/10.1109/iscas.2005.1465972","mag":"2109824002"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2005.1465972","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2005.1465972","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2005 IEEE International Symposium on Circuits and Systems","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5111898552","display_name":"Rung-Bin Lin","orcid":null},"institutions":[{"id":"https://openalex.org/I99908691","display_name":"Yuan Ze University","ror":"https://ror.org/01fv1ds98","country_code":"TW","type":"education","lineage":["https://openalex.org/I99908691"]}],"countries":["TW"],"is_corresponding":true,"raw_author_name":"Rung-Bin Lin","raw_affiliation_strings":["Computer Science and Engineering, Yuan-Ze University, Chungli, Taiwan","Dept. of Comput. Sci. & Eng., Yuan-Ze Univ., Chung-li, Taiwan"],"affiliations":[{"raw_affiliation_string":"Computer Science and Engineering, Yuan-Ze University, Chungli, Taiwan","institution_ids":["https://openalex.org/I99908691"]},{"raw_affiliation_string":"Dept. of Comput. Sci. & Eng., Yuan-Ze Univ., Chung-li, Taiwan","institution_ids":["https://openalex.org/I99908691"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5111898552"],"corresponding_institution_ids":["https://openalex.org/I99908691"],"apc_list":null,"apc_paid":null,"fwci":3.9911,"has_fulltext":false,"cited_by_count":11,"citation_normalized_percentile":{"value":0.93612484,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"5862","last_page":"5865"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/coding","display_name":"Coding (social sciences)","score":0.6786150932312012},{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.5746012926101685},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5585362911224365},{"id":"https://openalex.org/keywords/coupling","display_name":"Coupling (piping)","score":0.48004281520843506},{"id":"https://openalex.org/keywords/transfer","display_name":"Transfer (computing)","score":0.4214922785758972},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.35586369037628174},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.3451533615589142},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.3248199224472046},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.3023737967014313},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2081218659877777},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.18649056553840637},{"id":"https://openalex.org/keywords/statistics","display_name":"Statistics","score":0.12313655018806458},{"id":"https://openalex.org/keywords/combinatorics","display_name":"Combinatorics","score":0.0850943922996521}],"concepts":[{"id":"https://openalex.org/C179518139","wikidata":"https://www.wikidata.org/wiki/Q5140297","display_name":"Coding (social sciences)","level":2,"score":0.6786150932312012},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.5746012926101685},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5585362911224365},{"id":"https://openalex.org/C131584629","wikidata":"https://www.wikidata.org/wiki/Q4308705","display_name":"Coupling (piping)","level":2,"score":0.48004281520843506},{"id":"https://openalex.org/C2776175482","wikidata":"https://www.wikidata.org/wiki/Q1195816","display_name":"Transfer (computing)","level":2,"score":0.4214922785758972},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.35586369037628174},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3451533615589142},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.3248199224472046},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.3023737967014313},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2081218659877777},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.18649056553840637},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.12313655018806458},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.0850943922996521},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/iscas.2005.1465972","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2005.1465972","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2005 IEEE International Symposium on Circuits and Systems","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.454.3696","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.454.3696","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://vlsi.cse.yzu.edu.tw/research_paper/Conference/Bus-Invert.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":26,"referenced_works":["https://openalex.org/W1554572266","https://openalex.org/W1883543192","https://openalex.org/W1992759571","https://openalex.org/W1996824499","https://openalex.org/W2011654103","https://openalex.org/W2028260500","https://openalex.org/W2061311980","https://openalex.org/W2097821426","https://openalex.org/W2101524148","https://openalex.org/W2108543670","https://openalex.org/W2110113956","https://openalex.org/W2120527478","https://openalex.org/W2125115744","https://openalex.org/W2129716465","https://openalex.org/W2143602701","https://openalex.org/W2145735609","https://openalex.org/W2145941625","https://openalex.org/W2153128082","https://openalex.org/W2153731436","https://openalex.org/W2161008533","https://openalex.org/W2165072326","https://openalex.org/W2171977658","https://openalex.org/W4230266710","https://openalex.org/W4237274680","https://openalex.org/W4252360343","https://openalex.org/W6685064939"],"related_works":["https://openalex.org/W2532234348","https://openalex.org/W108084911","https://openalex.org/W2393440248","https://openalex.org/W1569386110","https://openalex.org/W2673314300","https://openalex.org/W2982169251","https://openalex.org/W2720892868","https://openalex.org/W2103406007","https://openalex.org/W2252127188","https://openalex.org/W2167676606"],"abstract_inverted_index":{"A":[0],"theoretical":[1,16,56],"analysis":[2,17],"of":[3,18,32],"bus-invert":[4,59],"coding":[5],"for":[6,21,37,58],"reducing":[7],"switching":[8],"activity":[9],"was":[10],"previously":[11,50],"investigated.":[12],"We":[13],"conduct":[14],"a":[15,38,41,54],"this":[19],"method":[20],"coupling":[22],"reduction.":[23],"Closed-form":[24],"formulas":[25],"are":[26],"derived":[27],"to":[28],"compute":[29],"the":[30,47],"number":[31],"couplings":[33],"per":[34],"bus":[35],"transfer":[36],"non-partitioned":[39],"versus":[40],"partitioned":[42],"bus.":[43],"Our":[44],"contribution":[45],"complements":[46],"work":[48],"done":[49],"and":[51],"helps":[52],"establish":[53],"sound":[55],"foundation":[57],"coding.":[60]},"counts_by_year":[],"updated_date":"2026-04-05T17:49:38.594831","created_date":"2025-10-10T00:00:00"}
