{"id":"https://openalex.org/W2147616833","doi":"https://doi.org/10.1109/iscas.2005.1465914","title":"An Explorative Tile-based Technique for Automated Constraint Transformation, Placement and Routing of High Frequency Analog Filters","display_name":"An Explorative Tile-based Technique for Automated Constraint Transformation, Placement and Routing of High Frequency Analog Filters","publication_year":2005,"publication_date":"2005-07-27","ids":{"openalex":"https://openalex.org/W2147616833","doi":"https://doi.org/10.1109/iscas.2005.1465914","mag":"2147616833"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2005.1465914","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2005.1465914","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2005 IEEE International Symposium on Circuits and Systems","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100715414","display_name":"Hui Zhang","orcid":"https://orcid.org/0000-0001-8012-4684"},"institutions":[{"id":"https://openalex.org/I59553526","display_name":"Stony Brook University","ror":"https://ror.org/05qghxh33","country_code":"US","type":"education","lineage":["https://openalex.org/I59553526"]},{"id":"https://openalex.org/I1327163397","display_name":"State University of New York","ror":"https://ror.org/01q1z8k08","country_code":"US","type":"education","lineage":["https://openalex.org/I1327163397"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Hui Zhang","raw_affiliation_strings":["Department of Electrical and Computer Engineering, State University of New York, Stony Brook, Stony Brook, NY, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, State University of New York, Stony Brook, Stony Brook, NY, USA","institution_ids":["https://openalex.org/I59553526","https://openalex.org/I1327163397"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5053713023","display_name":"P. Karthik","orcid":null},"institutions":[{"id":"https://openalex.org/I1327163397","display_name":"State University of New York","ror":"https://ror.org/01q1z8k08","country_code":"US","type":"education","lineage":["https://openalex.org/I1327163397"]},{"id":"https://openalex.org/I59553526","display_name":"Stony Brook University","ror":"https://ror.org/05qghxh33","country_code":"US","type":"education","lineage":["https://openalex.org/I59553526"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"P. Karthik","raw_affiliation_strings":["Department of Electrical and Computer Engineering, State University of New York, Stony Brook, Stony Brook, NY, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, State University of New York, Stony Brook, Stony Brook, NY, USA","institution_ids":["https://openalex.org/I59553526","https://openalex.org/I1327163397"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5109898844","display_name":"Hua Tang","orcid":null},"institutions":[{"id":"https://openalex.org/I59553526","display_name":"Stony Brook University","ror":"https://ror.org/05qghxh33","country_code":"US","type":"education","lineage":["https://openalex.org/I59553526"]},{"id":"https://openalex.org/I1327163397","display_name":"State University of New York","ror":"https://ror.org/01q1z8k08","country_code":"US","type":"education","lineage":["https://openalex.org/I1327163397"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Hua Tang","raw_affiliation_strings":["Department of Electrical and Computer Engineering, State University of New York, Stony Brook, Stony Brook, NY, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, State University of New York, Stony Brook, Stony Brook, NY, USA","institution_ids":["https://openalex.org/I59553526","https://openalex.org/I1327163397"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5080972445","display_name":"Alex Doboli","orcid":"https://orcid.org/0000-0003-2472-4014"},"institutions":[{"id":"https://openalex.org/I59553526","display_name":"Stony Brook University","ror":"https://ror.org/05qghxh33","country_code":"US","type":"education","lineage":["https://openalex.org/I59553526"]},{"id":"https://openalex.org/I1327163397","display_name":"State University of New York","ror":"https://ror.org/01q1z8k08","country_code":"US","type":"education","lineage":["https://openalex.org/I1327163397"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"A. Doboli","raw_affiliation_strings":["Department of Electrical and Computer Engineering, State University of New York, Stony Brook, Stony Brook, NY, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, State University of New York, Stony Brook, Stony Brook, NY, USA","institution_ids":["https://openalex.org/I59553526","https://openalex.org/I1327163397"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5100715414"],"corresponding_institution_ids":["https://openalex.org/I1327163397","https://openalex.org/I59553526"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.20499058,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"5629","last_page":"5632"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12162","display_name":"Cellular Automata and Applications","score":0.9973999857902527,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9972000122070312,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/routing","display_name":"Routing (electronic design automation)","score":0.6807109713554382},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.667737603187561},{"id":"https://openalex.org/keywords/sizing","display_name":"Sizing","score":0.5603832602500916},{"id":"https://openalex.org/keywords/representation","display_name":"Representation (politics)","score":0.5145068168640137},{"id":"https://openalex.org/keywords/floorplan","display_name":"Floorplan","score":0.512505292892456},{"id":"https://openalex.org/keywords/transformation","display_name":"Transformation (genetics)","score":0.5077544450759888},{"id":"https://openalex.org/keywords/tabu-search","display_name":"Tabu search","score":0.4561980366706848},{"id":"https://openalex.org/keywords/constraint","display_name":"Constraint (computer-aided design)","score":0.4470331072807312},{"id":"https://openalex.org/keywords/integrated-circuit-layout","display_name":"Integrated circuit layout","score":0.4292064607143402},{"id":"https://openalex.org/keywords/network-synthesis-filters","display_name":"Network synthesis filters","score":0.4253903031349182},{"id":"https://openalex.org/keywords/sampling","display_name":"Sampling (signal processing)","score":0.42387181520462036},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.39684540033340454},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3931998014450073},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.3725121021270752},{"id":"https://openalex.org/keywords/filter","display_name":"Filter (signal processing)","score":0.19141608476638794},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.18488332629203796},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.18075242638587952},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.15438970923423767}],"concepts":[{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.6807109713554382},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.667737603187561},{"id":"https://openalex.org/C2777767291","wikidata":"https://www.wikidata.org/wiki/Q1080291","display_name":"Sizing","level":2,"score":0.5603832602500916},{"id":"https://openalex.org/C2776359362","wikidata":"https://www.wikidata.org/wiki/Q2145286","display_name":"Representation (politics)","level":3,"score":0.5145068168640137},{"id":"https://openalex.org/C130145326","wikidata":"https://www.wikidata.org/wiki/Q1553985","display_name":"Floorplan","level":2,"score":0.512505292892456},{"id":"https://openalex.org/C204241405","wikidata":"https://www.wikidata.org/wiki/Q461499","display_name":"Transformation (genetics)","level":3,"score":0.5077544450759888},{"id":"https://openalex.org/C123370116","wikidata":"https://www.wikidata.org/wiki/Q1424540","display_name":"Tabu search","level":2,"score":0.4561980366706848},{"id":"https://openalex.org/C2776036281","wikidata":"https://www.wikidata.org/wiki/Q48769818","display_name":"Constraint (computer-aided design)","level":2,"score":0.4470331072807312},{"id":"https://openalex.org/C2765594","wikidata":"https://www.wikidata.org/wiki/Q2624187","display_name":"Integrated circuit layout","level":3,"score":0.4292064607143402},{"id":"https://openalex.org/C51297928","wikidata":"https://www.wikidata.org/wiki/Q7001207","display_name":"Network synthesis filters","level":2,"score":0.4253903031349182},{"id":"https://openalex.org/C140779682","wikidata":"https://www.wikidata.org/wiki/Q210868","display_name":"Sampling (signal processing)","level":3,"score":0.42387181520462036},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.39684540033340454},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3931998014450073},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3725121021270752},{"id":"https://openalex.org/C106131492","wikidata":"https://www.wikidata.org/wiki/Q3072260","display_name":"Filter (signal processing)","level":2,"score":0.19141608476638794},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.18488332629203796},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.18075242638587952},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.15438970923423767},{"id":"https://openalex.org/C17744445","wikidata":"https://www.wikidata.org/wiki/Q36442","display_name":"Political science","level":0,"score":0.0},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C55493867","wikidata":"https://www.wikidata.org/wiki/Q7094","display_name":"Biochemistry","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C104317684","wikidata":"https://www.wikidata.org/wiki/Q7187","display_name":"Gene","level":2,"score":0.0},{"id":"https://openalex.org/C94625758","wikidata":"https://www.wikidata.org/wiki/Q7163","display_name":"Politics","level":2,"score":0.0},{"id":"https://openalex.org/C199539241","wikidata":"https://www.wikidata.org/wiki/Q7748","display_name":"Law","level":1,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C185592680","wikidata":"https://www.wikidata.org/wiki/Q2329","display_name":"Chemistry","level":0,"score":0.0},{"id":"https://openalex.org/C31972630","wikidata":"https://www.wikidata.org/wiki/Q844240","display_name":"Computer vision","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/iscas.2005.1465914","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2005.1465914","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2005 IEEE International Symposium on Circuits and Systems","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.329.3522","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.329.3522","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.d.umn.edu/~htang/paper/ISCAS05_hui.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":19,"referenced_works":["https://openalex.org/W560265616","https://openalex.org/W1555778358","https://openalex.org/W2002330922","https://openalex.org/W2003837070","https://openalex.org/W2006594212","https://openalex.org/W2100740271","https://openalex.org/W2104670598","https://openalex.org/W2108092549","https://openalex.org/W2121482944","https://openalex.org/W2141776905","https://openalex.org/W2145458600","https://openalex.org/W2146519106","https://openalex.org/W2146875007","https://openalex.org/W2153960176","https://openalex.org/W2752885492","https://openalex.org/W3145128584","https://openalex.org/W4231071826","https://openalex.org/W4234125231","https://openalex.org/W7029321148"],"related_works":["https://openalex.org/W2124495928","https://openalex.org/W2129355781","https://openalex.org/W2096129555","https://openalex.org/W1826703475","https://openalex.org/W1494335789","https://openalex.org/W2130313585","https://openalex.org/W4363620137","https://openalex.org/W1535718467","https://openalex.org/W2097517502","https://openalex.org/W2161137937"],"abstract_inverted_index":{"The":[0,34,50],"paper":[1],"presents":[2],"an":[3],"original":[4],"methodology":[5],"and":[6,32,63],"algorithms":[7],"for":[8,84],"designing":[9],"high-frequency":[10],"analog":[11,85],"filters.":[12],"Filters":[13],"are":[14],"realized":[15],"to":[16],"meet":[17],"AC":[18],"performance":[19],"specifications":[20],"as":[21,23],"closely":[22],"possible.":[24],"Addressed":[25],"design":[26,36],"steps":[27],"include":[28],"parameter":[29],"sizing,":[30],"placement":[31],"routing.":[33],"explorative":[35],"method,":[37],"based":[38,80],"on":[39,81,89],"tabu":[40],"search,":[41],"takes":[42],"into":[43],"account":[44],"layout":[45,78],"parasitics":[46],"of":[47,59,68,76,94],"the":[48,60,74,92],"circuit.":[49],"synthesis":[51],"strategy":[52],"alternates":[53],"between":[54],"(1)":[55],"a":[56,65,77],"uniform":[57],"sampling":[58],"solution":[61],"space":[62],"(2)":[64],"focused":[66],"search":[67],"attractive":[69],"regions.":[70],"We":[71],"also":[72],"discuss":[73],"usage":[75],"representation":[79],"symbolic":[82],"tiles":[83],"system":[86],"synthesis.":[87],"Experiments":[88],"filters":[90],"demonstrate":[91],"quality":[93],"our":[95],"solution.":[96]},"counts_by_year":[],"updated_date":"2026-04-05T17:49:38.594831","created_date":"2025-10-10T00:00:00"}