{"id":"https://openalex.org/W2129773312","doi":"https://doi.org/10.1109/iscas.2005.1465906","title":"Adaptive Processing Applied to the Design of Highly Digital Analog Interfaces","display_name":"Adaptive Processing Applied to the Design of Highly Digital Analog Interfaces","publication_year":2005,"publication_date":"2005-07-27","ids":{"openalex":"https://openalex.org/W2129773312","doi":"https://doi.org/10.1109/iscas.2005.1465906","mag":"2129773312"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2005.1465906","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2005.1465906","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2005 IEEE International Symposium on Circuits and Systems","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5102732662","display_name":"A.A. de Souza","orcid":"https://orcid.org/0000-0002-1893-9468"},"institutions":[{"id":"https://openalex.org/I130442723","display_name":"Universidade Federal do Rio Grande do Sul","ror":"https://ror.org/041yk2d64","country_code":"BR","type":"education","lineage":["https://openalex.org/I130442723"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"A.A. de Souza","raw_affiliation_strings":["Instituto de Inform\u00e1tica / PPGC, Federal University of Rio Grande do Sul, Porto Alegre, Brazil","Inst. de Informatica, Univ. Fed. do Rio Grande do Sul, Porto Alegre, Brazil"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Instituto de Inform\u00e1tica / PPGC, Federal University of Rio Grande do Sul, Porto Alegre, Brazil","institution_ids":["https://openalex.org/I130442723"]},{"raw_affiliation_string":"Inst. de Informatica, Univ. Fed. do Rio Grande do Sul, Porto Alegre, Brazil","institution_ids":["https://openalex.org/I130442723"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5062358729","display_name":"Luigi Carro","orcid":"https://orcid.org/0000-0002-7402-4780"},"institutions":[{"id":"https://openalex.org/I130442723","display_name":"Universidade Federal do Rio Grande do Sul","ror":"https://ror.org/041yk2d64","country_code":"BR","type":"education","lineage":["https://openalex.org/I130442723"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"L. Carro","raw_affiliation_strings":["Instituto de Inform\u00e1tica / PPGC, Federal University of Rio Grande do Sul, Porto Alegre, Brazil","Inst. de Informatica, Univ. Fed. do Rio Grande do Sul, Porto Alegre, Brazil"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Instituto de Inform\u00e1tica / PPGC, Federal University of Rio Grande do Sul, Porto Alegre, Brazil","institution_ids":["https://openalex.org/I130442723"]},{"raw_affiliation_string":"Inst. de Informatica, Univ. Fed. do Rio Grande do Sul, Porto Alegre, Brazil","institution_ids":["https://openalex.org/I130442723"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5061332394","display_name":"J. Tousaad","orcid":null},"institutions":[{"id":"https://openalex.org/I130442723","display_name":"Universidade Federal do Rio Grande do Sul","ror":"https://ror.org/041yk2d64","country_code":"BR","type":"education","lineage":["https://openalex.org/I130442723"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"J. Tousaad","raw_affiliation_strings":["Departmento de Engenharia El\u00e9trica, Federal University of Rio Grande do Sul, Porto Alegre, Brazil","[Departmento de Engenharia El\u00e9trica, Federal University of Rio Grande do Sul, Porto Alegre, Brazil]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Departmento de Engenharia El\u00e9trica, Federal University of Rio Grande do Sul, Porto Alegre, Brazil","institution_ids":["https://openalex.org/I130442723"]},{"raw_affiliation_string":"[Departmento de Engenharia El\u00e9trica, Federal University of Rio Grande do Sul, Porto Alegre, Brazil]","institution_ids":["https://openalex.org/I130442723"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I130442723"],"apc_list":null,"apc_paid":null,"fwci":0.5479,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.7514359,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"18","issue":null,"first_page":"5597","last_page":"5600"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T12564","display_name":"Sensor Technology and Measurement Systems","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T12564","display_name":"Sensor Technology and Measurement Systems","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9980000257492065,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10320","display_name":"Neural Networks and Applications","score":0.9915000200271606,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.710922360420227},{"id":"https://openalex.org/keywords/analog-signal-processing","display_name":"Analog signal processing","score":0.7103297114372253},{"id":"https://openalex.org/keywords/adaptive-filter","display_name":"Adaptive filter","score":0.6237343549728394},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5852935314178467},{"id":"https://openalex.org/keywords/analog-device","display_name":"Analog device","score":0.558811366558075},{"id":"https://openalex.org/keywords/signal-processing","display_name":"Signal processing","score":0.5369259119033813},{"id":"https://openalex.org/keywords/analog-signal","display_name":"Analog signal","score":0.5244051218032837},{"id":"https://openalex.org/keywords/analogue-filter","display_name":"Analogue filter","score":0.48720282316207886},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.48358601331710815},{"id":"https://openalex.org/keywords/digital-filter","display_name":"Digital filter","score":0.4765908420085907},{"id":"https://openalex.org/keywords/analogue-electronics","display_name":"Analogue electronics","score":0.4708280861377716},{"id":"https://openalex.org/keywords/mixed-signal-integrated-circuit","display_name":"Mixed-signal integrated circuit","score":0.438036173582077},{"id":"https://openalex.org/keywords/path","display_name":"Path (computing)","score":0.4372679591178894},{"id":"https://openalex.org/keywords/analog-multiplier","display_name":"Analog multiplier","score":0.42093825340270996},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.35729503631591797},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.20167607069015503},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.1618523895740509},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.13444405794143677},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.12579235434532166},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.11634886264801025},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.1141035258769989},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.08435487747192383}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.710922360420227},{"id":"https://openalex.org/C379707","wikidata":"https://www.wikidata.org/wiki/Q2328303","display_name":"Analog signal processing","level":4,"score":0.7103297114372253},{"id":"https://openalex.org/C102248274","wikidata":"https://www.wikidata.org/wiki/Q168388","display_name":"Adaptive filter","level":2,"score":0.6237343549728394},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5852935314178467},{"id":"https://openalex.org/C90711627","wikidata":"https://www.wikidata.org/wiki/Q3742408","display_name":"Analog device","level":4,"score":0.558811366558075},{"id":"https://openalex.org/C104267543","wikidata":"https://www.wikidata.org/wiki/Q208163","display_name":"Signal processing","level":3,"score":0.5369259119033813},{"id":"https://openalex.org/C13412647","wikidata":"https://www.wikidata.org/wiki/Q174948","display_name":"Analog signal","level":3,"score":0.5244051218032837},{"id":"https://openalex.org/C176046018","wikidata":"https://www.wikidata.org/wiki/Q359205","display_name":"Analogue filter","level":4,"score":0.48720282316207886},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.48358601331710815},{"id":"https://openalex.org/C36390408","wikidata":"https://www.wikidata.org/wiki/Q1163067","display_name":"Digital filter","level":3,"score":0.4765908420085907},{"id":"https://openalex.org/C29074008","wikidata":"https://www.wikidata.org/wiki/Q174925","display_name":"Analogue electronics","level":3,"score":0.4708280861377716},{"id":"https://openalex.org/C62907940","wikidata":"https://www.wikidata.org/wiki/Q1541329","display_name":"Mixed-signal integrated circuit","level":3,"score":0.438036173582077},{"id":"https://openalex.org/C2777735758","wikidata":"https://www.wikidata.org/wiki/Q817765","display_name":"Path (computing)","level":2,"score":0.4372679591178894},{"id":"https://openalex.org/C98142538","wikidata":"https://www.wikidata.org/wiki/Q485005","display_name":"Analog multiplier","level":4,"score":0.42093825340270996},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.35729503631591797},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.20167607069015503},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.1618523895740509},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.13444405794143677},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.12579235434532166},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.11634886264801025},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.1141035258769989},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.08435487747192383},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas.2005.1465906","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2005.1465906","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2005 IEEE International Symposium on Circuits and Systems","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.4300000071525574,"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":14,"referenced_works":["https://openalex.org/W1667165204","https://openalex.org/W1994708634","https://openalex.org/W2009532400","https://openalex.org/W2107272777","https://openalex.org/W2113158412","https://openalex.org/W2117395961","https://openalex.org/W2124284759","https://openalex.org/W2127571679","https://openalex.org/W2140823559","https://openalex.org/W2145477670","https://openalex.org/W2158380613","https://openalex.org/W2942228371","https://openalex.org/W4238927229","https://openalex.org/W4251936905"],"related_works":["https://openalex.org/W2889983699","https://openalex.org/W2365016061","https://openalex.org/W1624706916","https://openalex.org/W4285819435","https://openalex.org/W2751342477","https://openalex.org/W1792053179","https://openalex.org/W2116226449","https://openalex.org/W2059191789","https://openalex.org/W2169924428","https://openalex.org/W4311313842"],"abstract_inverted_index":{"The":[0],"paper":[1],"proposes":[2],"the":[3,14,33,36,41,72],"use":[4,42],"of":[5,43],"complex":[6],"adaptive":[7,26],"processing":[8],"as":[9],"a":[10,61],"means":[11],"to":[12,16,30,54],"reduce":[13,58],"analog":[15,37,46],"digital":[17,50],"design":[18],"gap":[19],"on":[20,35],"mixed-signal":[21],"systems.":[22],"Linear":[23],"and":[24,57,71,74],"non-linear":[25],"filters":[27],"are":[28,52,77],"used":[29],"compensate":[31],"for":[32,60],"non-idealities":[34],"acquisition":[38,64],"path":[39],"allowing":[40],"low":[44],"cost":[45],"blocks.":[47],"Several":[48],"different":[49],"architectures":[51],"investigated":[53],"increase":[55],"resolution":[56],"non-linearities":[59],"target":[62],"two-tone":[63],"application.":[65],"A":[66],"prototype":[67],"board":[68],"is":[69],"designed":[70],"theoretical":[73],"measured":[75],"results":[76],"analyzed.":[78]},"counts_by_year":[],"updated_date":"2026-06-26T08:34:08.712188","created_date":"2025-10-10T00:00:00"}
