{"id":"https://openalex.org/W2164337088","doi":"https://doi.org/10.1109/iscas.2005.1465897","title":"Feedforward-Type Parasitic Capacitance Canceler and its Applicaton to 4 GB/S T/H Circuit","display_name":"Feedforward-Type Parasitic Capacitance Canceler and its Applicaton to 4 GB/S T/H Circuit","publication_year":2005,"publication_date":"2005-07-27","ids":{"openalex":"https://openalex.org/W2164337088","doi":"https://doi.org/10.1109/iscas.2005.1465897","mag":"2164337088"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2005.1465897","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2005.1465897","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2005 IEEE International Symposium on Circuits and Systems","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5031753306","display_name":"Toshinori Sato","orcid":"https://orcid.org/0000-0002-4429-6101"},"institutions":[{"id":"https://openalex.org/I114531698","display_name":"Tokyo Institute of Technology","ror":"https://ror.org/0112mx960","country_code":"JP","type":"education","lineage":["https://openalex.org/I114531698"]}],"countries":["JP"],"is_corresponding":true,"raw_author_name":"T. Sato","raw_affiliation_strings":["Tokyo Institute of Technology, Japan"],"affiliations":[{"raw_affiliation_string":"Tokyo Institute of Technology, Japan","institution_ids":["https://openalex.org/I114531698"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5110176541","display_name":"Y. Hashimoto","orcid":null},"institutions":[{"id":"https://openalex.org/I3412056","display_name":"Sanyo (Japan)","ror":"https://ror.org/03wrs2f16","country_code":"JP","type":"company","lineage":["https://openalex.org/I3412056"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Y. Hashimoto","raw_affiliation_strings":["Sanyo Electric Company Limited, Japan"],"affiliations":[{"raw_affiliation_string":"Sanyo Electric Company Limited, Japan","institution_ids":["https://openalex.org/I3412056"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5019467704","display_name":"S. Takagi","orcid":"https://orcid.org/0000-0002-2087-6937"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"S. Takagi","raw_affiliation_strings":["Rohm Company Limited, USA"],"affiliations":[{"raw_affiliation_string":"Rohm Company Limited, USA","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5073891442","display_name":"Kohji SAKATA","orcid":null},"institutions":[{"id":"https://openalex.org/I118347220","display_name":"NEC (Japan)","ror":"https://ror.org/04jndar25","country_code":"JP","type":"company","lineage":["https://openalex.org/I118347220"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"K. Sakata","raw_affiliation_strings":["NEC Corporation Limited, Japan"],"affiliations":[{"raw_affiliation_string":"NEC Corporation Limited, Japan","institution_ids":["https://openalex.org/I118347220"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5065647772","display_name":"Nobutada Fujii","orcid":"https://orcid.org/0000-0002-2845-0981"},"institutions":[{"id":"https://openalex.org/I114531698","display_name":"Tokyo Institute of Technology","ror":"https://ror.org/0112mx960","country_code":"JP","type":"education","lineage":["https://openalex.org/I114531698"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"N. Fujii","raw_affiliation_strings":["Tokyo Institute of Technology, Japan"],"affiliations":[{"raw_affiliation_string":"Tokyo Institute of Technology, Japan","institution_ids":["https://openalex.org/I114531698"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5056111012","display_name":"Hiroyuki Okada","orcid":"https://orcid.org/0000-0002-4447-8431"},"institutions":[{"id":"https://openalex.org/I118347220","display_name":"NEC (Japan)","ror":"https://ror.org/04jndar25","country_code":"JP","type":"company","lineage":["https://openalex.org/I118347220"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"H. Okada","raw_affiliation_strings":["NEC Corporation Limited, Japan"],"affiliations":[{"raw_affiliation_string":"NEC Corporation Limited, Japan","institution_ids":["https://openalex.org/I118347220"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5031753306"],"corresponding_institution_ids":["https://openalex.org/I114531698"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.20049194,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"5561","last_page":"5564"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/parasitic-extraction","display_name":"Parasitic extraction","score":0.8088955879211426},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5872957706451416},{"id":"https://openalex.org/keywords/capacitor","display_name":"Capacitor","score":0.5824662446975708},{"id":"https://openalex.org/keywords/capacitance","display_name":"Capacitance","score":0.5812508463859558},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5215511322021484},{"id":"https://openalex.org/keywords/parasitic-capacitance","display_name":"Parasitic capacitance","score":0.5175263285636902},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5095177292823792},{"id":"https://openalex.org/keywords/output-impedance","display_name":"Output impedance","score":0.4527488052845001},{"id":"https://openalex.org/keywords/electrical-impedance","display_name":"Electrical impedance","score":0.4297158718109131},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.41088762879371643},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.3698223829269409},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2598964273929596},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.15361079573631287}],"concepts":[{"id":"https://openalex.org/C159818811","wikidata":"https://www.wikidata.org/wiki/Q7135947","display_name":"Parasitic extraction","level":2,"score":0.8088955879211426},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5872957706451416},{"id":"https://openalex.org/C52192207","wikidata":"https://www.wikidata.org/wiki/Q5322","display_name":"Capacitor","level":3,"score":0.5824662446975708},{"id":"https://openalex.org/C30066665","wikidata":"https://www.wikidata.org/wiki/Q164399","display_name":"Capacitance","level":3,"score":0.5812508463859558},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5215511322021484},{"id":"https://openalex.org/C154318817","wikidata":"https://www.wikidata.org/wiki/Q2157249","display_name":"Parasitic capacitance","level":4,"score":0.5175263285636902},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5095177292823792},{"id":"https://openalex.org/C58112919","wikidata":"https://www.wikidata.org/wiki/Q631203","display_name":"Output impedance","level":3,"score":0.4527488052845001},{"id":"https://openalex.org/C17829176","wikidata":"https://www.wikidata.org/wiki/Q179043","display_name":"Electrical impedance","level":2,"score":0.4297158718109131},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.41088762879371643},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.3698223829269409},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2598964273929596},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.15361079573631287},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C17525397","wikidata":"https://www.wikidata.org/wiki/Q176140","display_name":"Electrode","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas.2005.1465897","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2005.1465897","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2005 IEEE International Symposium on Circuits and Systems","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.8700000047683716}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":4,"referenced_works":["https://openalex.org/W1511815957","https://openalex.org/W1583402315","https://openalex.org/W2061352877","https://openalex.org/W4285719527"],"related_works":["https://openalex.org/W3212531278","https://openalex.org/W2099626417","https://openalex.org/W2019514496","https://openalex.org/W3129126528","https://openalex.org/W2354552488","https://openalex.org/W2058545256","https://openalex.org/W2394034449","https://openalex.org/W2904654231","https://openalex.org/W2999380399","https://openalex.org/W4210807885"],"abstract_inverted_index":{"This":[0,35],"paper":[1],"proposes":[2],"a":[3,16,27,31,41,58,70],"novel":[4],"parasitic":[5],"capacitance":[6],"cancellation":[7,21,36],"method.":[8],"Since":[9],"parasitics":[10],"are":[11],"canceled":[12],"by":[13],"feedforwarding":[14],"signals,":[15],"circuit":[17,43,61,73],"using":[18,30],"the":[19],"proposed":[20],"method":[22,29,37,67],"is":[23,38,53,77],"always":[24],"stable":[25],"unlike":[26],"conventional":[28],"negative":[32],"impedance":[33],"converter.":[34],"applicable":[39],"to":[40,55,65],"balanced-type":[42],"driving":[44],"capacitors":[45],"with":[46,74,82],"source":[47],"followers.":[48],"As":[49],"an":[50],"example":[51],"it":[52],"applied":[54],"implementation":[56,68],"of":[57,69],"high-speed":[59],"track-and-hold":[60],"(T/H":[62],"circuit).":[63],"Thanks":[64],"this":[66],"4-Gbit/s":[71],"T/H":[72],"6-bit":[75],"accuracy":[76],"confirmed":[78],"through":[79],"HSPICE":[80],"simulations":[81],"90-nm":[83],"CMOS":[84],"process":[85],"under":[86],"0.9-V":[87],"power":[88],"supply":[89],"voltage.":[90]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
