{"id":"https://openalex.org/W2150761162","doi":"https://doi.org/10.1109/iscas.2005.1465896","title":"A Background Correction Technique for Timing Errors in Time-Interleaved Analog-to-Digital Converters.","display_name":"A Background Correction Technique for Timing Errors in Time-Interleaved Analog-to-Digital Converters.","publication_year":2005,"publication_date":"2005-07-27","ids":{"openalex":"https://openalex.org/W2150761162","doi":"https://doi.org/10.1109/iscas.2005.1465896","mag":"2150761162"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2005.1465896","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2005.1465896","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2005 IEEE International Symposium on Circuits and Systems","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5042677779","display_name":"Echere Iroaga","orcid":null},"institutions":[{"id":"https://openalex.org/I97018004","display_name":"Stanford University","ror":"https://ror.org/00f54p054","country_code":"US","type":"education","lineage":["https://openalex.org/I97018004"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"E. Iroaga","raw_affiliation_strings":["Department of Electrical Engineering, University of Stanford, Stanford, CA, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, University of Stanford, Stanford, CA, USA","institution_ids":["https://openalex.org/I97018004"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5029806914","display_name":"Boris Murmann","orcid":"https://orcid.org/0000-0003-3417-8782"},"institutions":[{"id":"https://openalex.org/I97018004","display_name":"Stanford University","ror":"https://ror.org/00f54p054","country_code":"US","type":"education","lineage":["https://openalex.org/I97018004"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"B. Murmann","raw_affiliation_strings":["Department of Electrical Engineering, University of Stanford, Stanford, CA, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, University of Stanford, Stanford, CA, USA","institution_ids":["https://openalex.org/I97018004"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5007374152","display_name":"L.Y. Nathawad","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"L. Nathawad","raw_affiliation_strings":["Atheros Communications, Inc., Irvine, CA, USA"],"affiliations":[{"raw_affiliation_string":"Atheros Communications, Inc., Irvine, CA, USA","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5042677779"],"corresponding_institution_ids":["https://openalex.org/I97018004"],"apc_list":null,"apc_paid":null,"fwci":1.7461,"has_fulltext":false,"cited_by_count":26,"citation_normalized_percentile":{"value":0.84432396,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"5557","last_page":"5560"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/converters","display_name":"Converters","score":0.8541113138198853},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6611135601997375},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4573076069355011},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2099604606628418},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.14383646845817566},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.08536520600318909}],"concepts":[{"id":"https://openalex.org/C2778422915","wikidata":"https://www.wikidata.org/wiki/Q10302051","display_name":"Converters","level":3,"score":0.8541113138198853},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6611135601997375},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4573076069355011},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2099604606628418},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.14383646845817566},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.08536520600318909}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas.2005.1465896","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2005.1465896","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2005 IEEE International Symposium on Circuits and Systems","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.6000000238418579,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W2107350448","https://openalex.org/W2109882405","https://openalex.org/W2113333016","https://openalex.org/W2119119508","https://openalex.org/W2143326453","https://openalex.org/W2143898707","https://openalex.org/W2153957754","https://openalex.org/W2169289334","https://openalex.org/W2898916015","https://openalex.org/W4232498893","https://openalex.org/W6676017887"],"related_works":["https://openalex.org/W1986220761","https://openalex.org/W2074272557","https://openalex.org/W2154984715","https://openalex.org/W2398835939","https://openalex.org/W2365626268","https://openalex.org/W1986485752","https://openalex.org/W2388301016","https://openalex.org/W4205798057","https://openalex.org/W2747419986","https://openalex.org/W2366440551"],"abstract_inverted_index":{"A":[0],"background":[1],"correction":[2],"scheme":[3],"for":[4,67],"timing":[5,34],"mismatch":[6],"in":[7,52,63],"time-interleaved":[8],"analog-to-digital":[9],"converters":[10],"(ADCs)":[11],"is":[12,16],"presented.":[13],"The":[14],"architecture":[15],"based":[17],"on":[18],"the":[19,33,41],"use":[20],"of":[21],"an":[22,27,72],"extra":[23],"ADC":[24],"channel":[25],"and":[26,36,58],"input":[28],"ramp":[29],"signal":[30],"to":[31,39],"estimate":[32],"errors,":[35],"digital":[37,43],"interpolation":[38],"correct":[40],"output":[42],"codes.":[44],"Simulated":[45],"results":[46],"demonstrate":[47],"a":[48,59,68],"35":[49],"dB":[50,61],"improvement":[51,62],"SFDR":[53],"(spurious":[54],"free":[55],"dynamic":[56],"range)":[57],"20":[60],"SNDR":[64],"(signal-to-noise-and-distortion":[65],"ratio)":[66],"10-bit":[69],"converter":[70],"with":[71],"over-sampling":[73],"ratio":[74],"greater":[75],"than":[76],"2":[77],"times.":[78]},"counts_by_year":[{"year":2022,"cited_by_count":2},{"year":2021,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":1},{"year":2015,"cited_by_count":2},{"year":2014,"cited_by_count":2},{"year":2012,"cited_by_count":6}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
