{"id":"https://openalex.org/W2123195837","doi":"https://doi.org/10.1109/iscas.2005.1465642","title":"A Low-power Motion Compensation IP Core Design for MPEG-1/2/4 Video Decoding","display_name":"A Low-power Motion Compensation IP Core Design for MPEG-1/2/4 Video Decoding","publication_year":2005,"publication_date":"2005-07-27","ids":{"openalex":"https://openalex.org/W2123195837","doi":"https://doi.org/10.1109/iscas.2005.1465642","mag":"2123195837"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2005.1465642","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2005.1465642","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2005 IEEE International Symposium on Circuits and Systems","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5109217275","display_name":"Chih-Da Chien","orcid":null},"institutions":[{"id":"https://openalex.org/I148099254","display_name":"National Chung Cheng University","ror":"https://ror.org/0028v3876","country_code":"TW","type":"education","lineage":["https://openalex.org/I148099254"]}],"countries":["TW"],"is_corresponding":true,"raw_author_name":"Chih-Da Chien","raw_affiliation_strings":["Department of Computer Science and Information Engineering, National Chung Cheng University, Chiayi, Taiwan","Dept. of Comput. Sci. & Inf. Eng., National Chung Cheng Univ., Chia-Yi, Taiwan"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Information Engineering, National Chung Cheng University, Chiayi, Taiwan","institution_ids":["https://openalex.org/I148099254"]},{"raw_affiliation_string":"Dept. of Comput. Sci. & Inf. Eng., National Chung Cheng Univ., Chia-Yi, Taiwan","institution_ids":["https://openalex.org/I148099254"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5063814859","display_name":"H. J. Chen","orcid":null},"institutions":[{"id":"https://openalex.org/I148099254","display_name":"National Chung Cheng University","ror":"https://ror.org/0028v3876","country_code":"TW","type":"education","lineage":["https://openalex.org/I148099254"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Ho-Chun Chen","raw_affiliation_strings":["Department of Computer Science and Information Engineering, National Chung Cheng University, Chiayi, Taiwan","Dept. of Comput. Sci. & Inf. Eng., National Chung Cheng Univ., Chia-Yi, Taiwan"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Information Engineering, National Chung Cheng University, Chiayi, Taiwan","institution_ids":["https://openalex.org/I148099254"]},{"raw_affiliation_string":"Dept. of Comput. Sci. & Inf. Eng., National Chung Cheng Univ., Chia-Yi, Taiwan","institution_ids":["https://openalex.org/I148099254"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5015203250","display_name":"Lin-Chieh Huang","orcid":"https://orcid.org/0000-0002-3699-4778"},"institutions":[{"id":"https://openalex.org/I148099254","display_name":"National Chung Cheng University","ror":"https://ror.org/0028v3876","country_code":"TW","type":"education","lineage":["https://openalex.org/I148099254"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Lin-Chieh Huang","raw_affiliation_strings":["Department of Computer Science and Information Engineering, National Chung Cheng University, Chiayi, Taiwan","Dept. of Comput. Sci. & Inf. Eng., National Chung Cheng Univ., Chia-Yi, Taiwan"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Information Engineering, National Chung Cheng University, Chiayi, Taiwan","institution_ids":["https://openalex.org/I148099254"]},{"raw_affiliation_string":"Dept. of Comput. Sci. & Inf. Eng., National Chung Cheng Univ., Chia-Yi, Taiwan","institution_ids":["https://openalex.org/I148099254"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5102243349","display_name":"Jiun-In Guo","orcid":null},"institutions":[{"id":"https://openalex.org/I148099254","display_name":"National Chung Cheng University","ror":"https://ror.org/0028v3876","country_code":"TW","type":"education","lineage":["https://openalex.org/I148099254"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Jiun-In Guo","raw_affiliation_strings":["Department of Computer Science and Information Engineering, National Chung Cheng University, Chiayi, Taiwan","Dept. of Comput. Sci. & Inf. Eng., National Chung Cheng Univ., Chia-Yi, Taiwan"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Information Engineering, National Chung Cheng University, Chiayi, Taiwan","institution_ids":["https://openalex.org/I148099254"]},{"raw_affiliation_string":"Dept. of Comput. Sci. & Inf. Eng., National Chung Cheng Univ., Chia-Yi, Taiwan","institution_ids":["https://openalex.org/I148099254"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5109217275"],"corresponding_institution_ids":["https://openalex.org/I148099254"],"apc_list":null,"apc_paid":null,"fwci":0.6359,"has_fulltext":false,"cited_by_count":7,"citation_normalized_percentile":{"value":0.69837587,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"3","issue":null,"first_page":"4542","last_page":"4545"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10741","display_name":"Video Coding and Compression Technologies","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10741","display_name":"Video Coding and Compression Technologies","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.9979000091552734,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10901","display_name":"Advanced Data Compression Techniques","score":0.984000027179718,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7661005854606628},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6296522617340088},{"id":"https://openalex.org/keywords/application-specific-integrated-circuit","display_name":"Application-specific integrated circuit","score":0.5833953022956848},{"id":"https://openalex.org/keywords/adder","display_name":"Adder","score":0.5768488049507141},{"id":"https://openalex.org/keywords/decoding-methods","display_name":"Decoding methods","score":0.5744850039482117},{"id":"https://openalex.org/keywords/interpolation","display_name":"Interpolation (computer graphics)","score":0.5394992828369141},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.5338417887687683},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.4838792085647583},{"id":"https://openalex.org/keywords/pixel","display_name":"Pixel","score":0.44669458270072937},{"id":"https://openalex.org/keywords/low-power-electronics","display_name":"Low-power electronics","score":0.4451790153980255},{"id":"https://openalex.org/keywords/motion-compensation","display_name":"Motion compensation","score":0.4349077343940735},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.42565280199050903},{"id":"https://openalex.org/keywords/mpeg-4","display_name":"MPEG-4","score":0.42259353399276733},{"id":"https://openalex.org/keywords/real-time-computing","display_name":"Real-time computing","score":0.35914748907089233},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.3379034399986267},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.22117751836776733},{"id":"https://openalex.org/keywords/power-consumption","display_name":"Power consumption","score":0.2058373987674713},{"id":"https://openalex.org/keywords/frame","display_name":"Frame (networking)","score":0.19777745008468628},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.1616581678390503},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.1404455602169037},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1161872148513794},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.10602906346321106},{"id":"https://openalex.org/keywords/coding","display_name":"Coding (social sciences)","score":0.1055174469947815}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7661005854606628},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6296522617340088},{"id":"https://openalex.org/C77390884","wikidata":"https://www.wikidata.org/wiki/Q217302","display_name":"Application-specific integrated circuit","level":2,"score":0.5833953022956848},{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.5768488049507141},{"id":"https://openalex.org/C57273362","wikidata":"https://www.wikidata.org/wiki/Q576722","display_name":"Decoding methods","level":2,"score":0.5744850039482117},{"id":"https://openalex.org/C137800194","wikidata":"https://www.wikidata.org/wiki/Q11713455","display_name":"Interpolation (computer graphics)","level":3,"score":0.5394992828369141},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.5338417887687683},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.4838792085647583},{"id":"https://openalex.org/C160633673","wikidata":"https://www.wikidata.org/wiki/Q355198","display_name":"Pixel","level":2,"score":0.44669458270072937},{"id":"https://openalex.org/C117551214","wikidata":"https://www.wikidata.org/wiki/Q6692774","display_name":"Low-power electronics","level":4,"score":0.4451790153980255},{"id":"https://openalex.org/C128840427","wikidata":"https://www.wikidata.org/wiki/Q1302174","display_name":"Motion compensation","level":2,"score":0.4349077343940735},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.42565280199050903},{"id":"https://openalex.org/C97501218","wikidata":"https://www.wikidata.org/wiki/Q219763","display_name":"MPEG-4","level":3,"score":0.42259353399276733},{"id":"https://openalex.org/C79403827","wikidata":"https://www.wikidata.org/wiki/Q3988","display_name":"Real-time computing","level":1,"score":0.35914748907089233},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.3379034399986267},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.22117751836776733},{"id":"https://openalex.org/C2984118289","wikidata":"https://www.wikidata.org/wiki/Q29954","display_name":"Power consumption","level":3,"score":0.2058373987674713},{"id":"https://openalex.org/C126042441","wikidata":"https://www.wikidata.org/wiki/Q1324888","display_name":"Frame (networking)","level":2,"score":0.19777745008468628},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.1616581678390503},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.1404455602169037},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1161872148513794},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.10602906346321106},{"id":"https://openalex.org/C179518139","wikidata":"https://www.wikidata.org/wiki/Q5140297","display_name":"Coding (social sciences)","level":2,"score":0.1055174469947815},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas.2005.1465642","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2005.1465642","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2005 IEEE International Symposium on Circuits and Systems","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.8899999856948853,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":6,"referenced_works":["https://openalex.org/W1510983347","https://openalex.org/W1969692881","https://openalex.org/W2065190499","https://openalex.org/W2085676321","https://openalex.org/W2131864516","https://openalex.org/W6630613191"],"related_works":["https://openalex.org/W4390550886","https://openalex.org/W3217463396","https://openalex.org/W2790557758","https://openalex.org/W2516396101","https://openalex.org/W3204929712","https://openalex.org/W2145169882","https://openalex.org/W2189585076","https://openalex.org/W2508663728","https://openalex.org/W2024650003","https://openalex.org/W37189869"],"abstract_inverted_index":{"The":[0],"proposed":[1,88,98,117],"IP":[2],"core":[3],"design":[4,5,36,54,99,118],"exploits":[6],"an":[7],"adder-based":[8],"quarter-pixel":[9,31],"filter":[10,32],"optimized":[11],"by":[12],"data":[13],"sharing":[14],"for":[15,127],"low":[16],"cost":[17],"consideration.":[18],"This":[19],"optimization":[20],"reduces":[21],"over":[22],"87%":[23],"of":[24,82,103],"hardware":[25],"complexity":[26],"as":[27],"compared":[28],"to":[29,62],"the":[30,34,64,72,79,83,87,97,116],"in":[33,78,86],"existing":[35],"(Wang,":[37],"J.X.":[38],"et":[39],"al.":[40],"Proc.":[41],"IEEE":[42],"ASIC":[43],"Conf.,":[44],"vol.2,":[45],"p.942-5,":[46],"2003).":[47],"In":[48,114],"addition,":[49,115],"we":[50,74],"propose":[51],"a":[52,91,123,131],"low-power":[53],"technique":[55],"called":[56],"dynamic":[57],"partially":[58],"guarded":[59],"computation":[60],"(DPGC)":[61],"reduce":[63],"power":[65,80],"consumption":[66,81],"on":[67,106],"pixel":[68],"interpolation.":[69],"After":[70],"applying":[71],"DPGC,":[73],"obtain":[75],"60%":[76],"reduction":[77],"interpolation":[84],"operations":[85],"design.":[89],"Using":[90],"0.18":[92],"/spl":[93],"mu/m":[94],"CMOS":[95],"technology,":[96],"achieves":[100],"real-time":[101],"processing":[102],"MPEG-1/2/4":[104],"decoding":[105],"4CIF":[107],"video":[108,125],"when":[109],"operated":[110],"at":[111],"54":[112],"MHz.":[113],"has":[119],"been":[120],"integrated":[121],"into":[122],"MPEG-4":[124],"decoder":[126],"system":[128],"verification":[129],"through":[130],"XILINX":[132],"multimedia":[133],"FPGA":[134],"board.":[135]},"counts_by_year":[{"year":2015,"cited_by_count":1},{"year":2013,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
