{"id":"https://openalex.org/W2117636667","doi":"https://doi.org/10.1109/iscas.2005.1465490","title":"A Gray-Coded Digital-to-Analog Converter for a Mixed-Mode Processor Array","display_name":"A Gray-Coded Digital-to-Analog Converter for a Mixed-Mode Processor Array","publication_year":2005,"publication_date":"2005-07-27","ids":{"openalex":"https://openalex.org/W2117636667","doi":"https://doi.org/10.1109/iscas.2005.1465490","mag":"2117636667"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2005.1465490","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2005.1465490","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2005 IEEE International Symposium on Circuits and Systems","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5001643517","display_name":"L. Vesalainen","orcid":null},"institutions":[{"id":"https://openalex.org/I155660961","display_name":"University of Turku","ror":"https://ror.org/05vghhr25","country_code":"FI","type":"education","lineage":["https://openalex.org/I155660961"]},{"id":"https://openalex.org/I183173800","display_name":"Turku Centre for Computer Science","ror":"https://ror.org/00vy7ed73","country_code":"FI","type":"facility","lineage":["https://openalex.org/I130217899","https://openalex.org/I155660961","https://openalex.org/I183173800"]}],"countries":["FI"],"is_corresponding":false,"raw_author_name":"L. Vesalainen","raw_affiliation_strings":["Department of Information Technology, Microelectronics Laboratory, University of Turku, Turku, Finland","Turku Center for Computer Science, Finland"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Information Technology, Microelectronics Laboratory, University of Turku, Turku, Finland","institution_ids":["https://openalex.org/I155660961"]},{"raw_affiliation_string":"Turku Center for Computer Science, Finland","institution_ids":["https://openalex.org/I183173800"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5088530873","display_name":"Jonne Poikonen","orcid":"https://orcid.org/0000-0002-5531-2453"},"institutions":[{"id":"https://openalex.org/I155660961","display_name":"University of Turku","ror":"https://ror.org/05vghhr25","country_code":"FI","type":"education","lineage":["https://openalex.org/I155660961"]},{"id":"https://openalex.org/I183173800","display_name":"Turku Centre for Computer Science","ror":"https://ror.org/00vy7ed73","country_code":"FI","type":"facility","lineage":["https://openalex.org/I130217899","https://openalex.org/I155660961","https://openalex.org/I183173800"]}],"countries":["FI"],"is_corresponding":false,"raw_author_name":"J. Poikonen","raw_affiliation_strings":["Department of Information Technology, Microelectronics Laboratory, University of Turku, Turku, Finland","Turku Center for Computer Science, Finland"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Information Technology, Microelectronics Laboratory, University of Turku, Turku, Finland","institution_ids":["https://openalex.org/I155660961"]},{"raw_affiliation_string":"Turku Center for Computer Science, Finland","institution_ids":["https://openalex.org/I183173800"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5038944203","display_name":"A. Paasio","orcid":"https://orcid.org/0000-0003-2543-7391"},"institutions":[{"id":"https://openalex.org/I155660961","display_name":"University of Turku","ror":"https://ror.org/05vghhr25","country_code":"FI","type":"education","lineage":["https://openalex.org/I155660961"]}],"countries":["FI"],"is_corresponding":false,"raw_author_name":"A. Paasio","raw_affiliation_strings":["Department of Information Technology, Microelectronics Laboratory, University of Turku, Turku, Finland"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Information Technology, Microelectronics Laboratory, University of Turku, Turku, Finland","institution_ids":["https://openalex.org/I155660961"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.18357213,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"3","issue":null,"first_page":"3930","last_page":"3933"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.714339554309845},{"id":"https://openalex.org/keywords/digital-to-analog-converter","display_name":"Digital-to-analog converter","score":0.5554288625717163},{"id":"https://openalex.org/keywords/integral-nonlinearity","display_name":"Integral nonlinearity","score":0.544329047203064},{"id":"https://openalex.org/keywords/analog-image-processing","display_name":"Analog image processing","score":0.5414727926254272},{"id":"https://openalex.org/keywords/analog-to-digital-converter","display_name":"Analog-to-digital converter","score":0.526865541934967},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.5180764198303223},{"id":"https://openalex.org/keywords/mixed-signal-integrated-circuit","display_name":"Mixed-signal integrated circuit","score":0.49562132358551025},{"id":"https://openalex.org/keywords/image-processing","display_name":"Image processing","score":0.43661969900131226},{"id":"https://openalex.org/keywords/mode","display_name":"Mode (computer interface)","score":0.43166419863700867},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.41405779123306274},{"id":"https://openalex.org/keywords/digital-image-processing","display_name":"Digital image processing","score":0.3817308247089386},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.25742000341415405},{"id":"https://openalex.org/keywords/image","display_name":"Image (mathematics)","score":0.25565099716186523},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.24528589844703674},{"id":"https://openalex.org/keywords/converters","display_name":"Converters","score":0.18399709463119507},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.18072378635406494},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.16297796368598938},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.10401058197021484}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.714339554309845},{"id":"https://openalex.org/C2779879419","wikidata":"https://www.wikidata.org/wiki/Q210863","display_name":"Digital-to-analog converter","level":3,"score":0.5554288625717163},{"id":"https://openalex.org/C130829357","wikidata":"https://www.wikidata.org/wiki/Q1665386","display_name":"Integral nonlinearity","level":4,"score":0.544329047203064},{"id":"https://openalex.org/C28525508","wikidata":"https://www.wikidata.org/wiki/Q4751054","display_name":"Analog image processing","level":5,"score":0.5414727926254272},{"id":"https://openalex.org/C2777271169","wikidata":"https://www.wikidata.org/wiki/Q190169","display_name":"Analog-to-digital converter","level":3,"score":0.526865541934967},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.5180764198303223},{"id":"https://openalex.org/C62907940","wikidata":"https://www.wikidata.org/wiki/Q1541329","display_name":"Mixed-signal integrated circuit","level":3,"score":0.49562132358551025},{"id":"https://openalex.org/C9417928","wikidata":"https://www.wikidata.org/wiki/Q1070689","display_name":"Image processing","level":3,"score":0.43661969900131226},{"id":"https://openalex.org/C48677424","wikidata":"https://www.wikidata.org/wiki/Q6888088","display_name":"Mode (computer interface)","level":2,"score":0.43166419863700867},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.41405779123306274},{"id":"https://openalex.org/C104317675","wikidata":"https://www.wikidata.org/wiki/Q1070689","display_name":"Digital image processing","level":4,"score":0.3817308247089386},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.25742000341415405},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.25565099716186523},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.24528589844703674},{"id":"https://openalex.org/C2778422915","wikidata":"https://www.wikidata.org/wiki/Q10302051","display_name":"Converters","level":3,"score":0.18399709463119507},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.18072378635406494},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.16297796368598938},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.10401058197021484},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas.2005.1465490","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2005.1465490","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2005 IEEE International Symposium on Circuits and Systems","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.49000000953674316,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":5,"referenced_works":["https://openalex.org/W1480838992","https://openalex.org/W1518057417","https://openalex.org/W2100836723","https://openalex.org/W2160121923","https://openalex.org/W6631066267"],"related_works":["https://openalex.org/W2025217054","https://openalex.org/W4385507378","https://openalex.org/W4321101229","https://openalex.org/W2104719521","https://openalex.org/W2187062327","https://openalex.org/W131917664","https://openalex.org/W1624706916","https://openalex.org/W3203630111","https://openalex.org/W2316514297","https://openalex.org/W2977189477"],"abstract_inverted_index":{"In":[0],"this":[1],"paper":[2],"we":[3],"propose":[4],"a":[5,22,72],"Gray-coded":[6],"digital-to-analog":[7],"converter":[8],"(DAC)":[9],"structure":[10],"that":[11],"has":[12,74],"been":[13],"validated":[14],"with":[15],"simulations.":[16],"The":[17],"DAC":[18,73],"is":[19,67],"designed":[20],"for":[21,31],"cellular":[23],"nonlinear":[24],"network":[25],"(CNN)-type":[26],"mixed-mode":[27],"array":[28,59],"processor":[29],"intended":[30],"real":[32],"time":[33],"image":[34,48],"processing":[35],"applications.":[36],"With":[37],"digital":[38],"I/O":[39],"operations,":[40],"required":[41],"bias":[42],"values":[43],"and":[44,54],"also":[45],"an":[46],"input":[47],"can":[49],"be":[50,76],"loaded":[51],"very":[52],"quickly":[53],"easily":[55],"stored":[56],"into":[57,78],"the":[58,62,65],"structure.":[60],"However,":[61],"computing":[63],"inside":[64],"cells":[66],"analog.":[68],"Because":[69],"of":[70],"that,":[71],"to":[75],"included":[77],"every":[79],"cell.":[80]},"counts_by_year":[],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
