{"id":"https://openalex.org/W2159423488","doi":"https://doi.org/10.1109/iscas.2005.1464512","title":"Device Technology for Body Biasing Scheme","display_name":"Device Technology for Body Biasing Scheme","publication_year":2005,"publication_date":"2005-07-27","ids":{"openalex":"https://openalex.org/W2159423488","doi":"https://doi.org/10.1109/iscas.2005.1464512","mag":"2159423488"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2005.1464512","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2005.1464512","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2005 IEEE International Symposium on Circuits and Systems","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5082815940","display_name":"Kazuo Imai","orcid":"https://orcid.org/0000-0002-8416-7371"},"institutions":[{"id":"https://openalex.org/I118347220","display_name":"NEC (Japan)","ror":"https://ror.org/04jndar25","country_code":"JP","type":"company","lineage":["https://openalex.org/I118347220"]}],"countries":["JP"],"is_corresponding":true,"raw_author_name":"K. Imai","raw_affiliation_strings":["Advanced Device Development Division, NEC Corporation Limited, Sagamihara, Kanagawa, Japan"],"affiliations":[{"raw_affiliation_string":"Advanced Device Development Division, NEC Corporation Limited, Sagamihara, Kanagawa, Japan","institution_ids":["https://openalex.org/I118347220"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5112274245","display_name":"Y. Yamagata","orcid":null},"institutions":[{"id":"https://openalex.org/I118347220","display_name":"NEC (Japan)","ror":"https://ror.org/04jndar25","country_code":"JP","type":"company","lineage":["https://openalex.org/I118347220"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Y. Yamagata","raw_affiliation_strings":["Advanced Device Development Division, NEC Corporation Limited, Sagamihara, Kanagawa, Japan"],"affiliations":[{"raw_affiliation_string":"Advanced Device Development Division, NEC Corporation Limited, Sagamihara, Kanagawa, Japan","institution_ids":["https://openalex.org/I118347220"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5000708439","display_name":"S. Masuoka","orcid":null},"institutions":[{"id":"https://openalex.org/I118347220","display_name":"NEC (Japan)","ror":"https://ror.org/04jndar25","country_code":"JP","type":"company","lineage":["https://openalex.org/I118347220"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"S. Masuoka","raw_affiliation_strings":["Advanced Device Development Division, NEC Corporation Limited, Sagamihara, Kanagawa, Japan"],"affiliations":[{"raw_affiliation_string":"Advanced Device Development Division, NEC Corporation Limited, Sagamihara, Kanagawa, Japan","institution_ids":["https://openalex.org/I118347220"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5014287874","display_name":"N. Kimuzuka","orcid":null},"institutions":[{"id":"https://openalex.org/I118347220","display_name":"NEC (Japan)","ror":"https://ror.org/04jndar25","country_code":"JP","type":"company","lineage":["https://openalex.org/I118347220"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"N. Kimuzuka","raw_affiliation_strings":["Advanced Device Development Division, NEC Corporation Limited, Sagamihara, Kanagawa, Japan"],"affiliations":[{"raw_affiliation_string":"Advanced Device Development Division, NEC Corporation Limited, Sagamihara, Kanagawa, Japan","institution_ids":["https://openalex.org/I118347220"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5018078218","display_name":"Y. Yasuda","orcid":"https://orcid.org/0000-0002-7216-0463"},"institutions":[{"id":"https://openalex.org/I118347220","display_name":"NEC (Japan)","ror":"https://ror.org/04jndar25","country_code":"JP","type":"company","lineage":["https://openalex.org/I118347220"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Y. Yasuda","raw_affiliation_strings":["Advanced Device Development Division, NEC Corporation Limited, Sagamihara, Kanagawa, Japan"],"affiliations":[{"raw_affiliation_string":"Advanced Device Development Division, NEC Corporation Limited, Sagamihara, Kanagawa, Japan","institution_ids":["https://openalex.org/I118347220"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5043819315","display_name":"M. Togo","orcid":"https://orcid.org/0000-0002-0251-9944"},"institutions":[{"id":"https://openalex.org/I118347220","display_name":"NEC (Japan)","ror":"https://ror.org/04jndar25","country_code":"JP","type":"company","lineage":["https://openalex.org/I118347220"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"M. Togo","raw_affiliation_strings":["Advanced Device Development Division, NEC Corporation Limited, Sagamihara, Kanagawa, Japan"],"affiliations":[{"raw_affiliation_string":"Advanced Device Development Division, NEC Corporation Limited, Sagamihara, Kanagawa, Japan","institution_ids":["https://openalex.org/I118347220"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5063588573","display_name":"Masayuki Ikeda","orcid":"https://orcid.org/0000-0002-6758-0244"},"institutions":[{"id":"https://openalex.org/I118347220","display_name":"NEC (Japan)","ror":"https://ror.org/04jndar25","country_code":"JP","type":"company","lineage":["https://openalex.org/I118347220"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"M. Ikeda","raw_affiliation_strings":["Advanced Device Development Division, NEC Corporation Limited, Sagamihara, Kanagawa, Japan"],"affiliations":[{"raw_affiliation_string":"Advanced Device Development Division, NEC Corporation Limited, Sagamihara, Kanagawa, Japan","institution_ids":["https://openalex.org/I118347220"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5016512942","display_name":"Y. Nakashiba","orcid":null},"institutions":[{"id":"https://openalex.org/I118347220","display_name":"NEC (Japan)","ror":"https://ror.org/04jndar25","country_code":"JP","type":"company","lineage":["https://openalex.org/I118347220"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Y. Nakashiba","raw_affiliation_strings":["Advanced Device Development Division, NEC Corporation Limited, Sagamihara, Kanagawa, Japan"],"affiliations":[{"raw_affiliation_string":"Advanced Device Development Division, NEC Corporation Limited, Sagamihara, Kanagawa, Japan","institution_ids":["https://openalex.org/I118347220"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":8,"corresponding_author_ids":["https://openalex.org/A5082815940"],"corresponding_institution_ids":["https://openalex.org/I118347220"],"apc_list":null,"apc_paid":null,"fwci":1.0885,"has_fulltext":false,"cited_by_count":12,"citation_normalized_percentile":{"value":0.80720151,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"13","last_page":"16"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.8453155755996704},{"id":"https://openalex.org/keywords/leakage","display_name":"Leakage (economics)","score":0.729400098323822},{"id":"https://openalex.org/keywords/standby-power","display_name":"Standby power","score":0.7288246154785156},{"id":"https://openalex.org/keywords/biasing","display_name":"Biasing","score":0.6333892345428467},{"id":"https://openalex.org/keywords/leakage-power","display_name":"Leakage power","score":0.6008193492889404},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.5267940163612366},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.4828549027442932},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.45797085762023926},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.452023983001709},{"id":"https://openalex.org/keywords/reliability","display_name":"Reliability (semiconductor)","score":0.43135446310043335},{"id":"https://openalex.org/keywords/optoelectronics","display_name":"Optoelectronics","score":0.4194677472114563},{"id":"https://openalex.org/keywords/node","display_name":"Node (physics)","score":0.4141547381877899},{"id":"https://openalex.org/keywords/threshold-voltage","display_name":"Threshold voltage","score":0.41312819719314575},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4106452763080597},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.36012089252471924},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.3480656147003174},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.2521352767944336},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.22124290466308594},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.09767672419548035}],"concepts":[{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.8453155755996704},{"id":"https://openalex.org/C2777042071","wikidata":"https://www.wikidata.org/wiki/Q6509304","display_name":"Leakage (economics)","level":2,"score":0.729400098323822},{"id":"https://openalex.org/C7140552","wikidata":"https://www.wikidata.org/wiki/Q1366402","display_name":"Standby power","level":3,"score":0.7288246154785156},{"id":"https://openalex.org/C20254490","wikidata":"https://www.wikidata.org/wiki/Q719550","display_name":"Biasing","level":3,"score":0.6333892345428467},{"id":"https://openalex.org/C2987719587","wikidata":"https://www.wikidata.org/wiki/Q1811428","display_name":"Leakage power","level":4,"score":0.6008193492889404},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.5267940163612366},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.4828549027442932},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.45797085762023926},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.452023983001709},{"id":"https://openalex.org/C43214815","wikidata":"https://www.wikidata.org/wiki/Q7310987","display_name":"Reliability (semiconductor)","level":3,"score":0.43135446310043335},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.4194677472114563},{"id":"https://openalex.org/C62611344","wikidata":"https://www.wikidata.org/wiki/Q1062658","display_name":"Node (physics)","level":2,"score":0.4141547381877899},{"id":"https://openalex.org/C195370968","wikidata":"https://www.wikidata.org/wiki/Q1754002","display_name":"Threshold voltage","level":4,"score":0.41312819719314575},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4106452763080597},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.36012089252471924},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.3480656147003174},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.2521352767944336},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.22124290466308594},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.09767672419548035},{"id":"https://openalex.org/C66938386","wikidata":"https://www.wikidata.org/wiki/Q633538","display_name":"Structural engineering","level":1,"score":0.0},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/iscas.2005.1464512","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2005.1464512","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2005 IEEE International Symposium on Circuits and Systems","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.338.3937","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.338.3937","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.8700000047683716,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":6,"referenced_works":["https://openalex.org/W1596675129","https://openalex.org/W1980390262","https://openalex.org/W2108049334","https://openalex.org/W2108143446","https://openalex.org/W2114602166","https://openalex.org/W2994300878"],"related_works":["https://openalex.org/W2039755656","https://openalex.org/W1949737515","https://openalex.org/W2042352336","https://openalex.org/W2144417859","https://openalex.org/W4240087758","https://openalex.org/W2147835582","https://openalex.org/W2071775671","https://openalex.org/W2319171333","https://openalex.org/W2083626899","https://openalex.org/W2088008649"],"abstract_inverted_index":{"We":[0],"report":[1],"power-aware":[2],"65-nm":[3],"node":[4],"CMOS":[5],"device":[6,39],"technology":[7],"suitable":[8],"for":[9],"a":[10],"body":[11,51],"biasing":[12],"scheme.":[13],"For":[14],"high-performance":[15],"CMOS,":[16],"both":[17,66],"channel":[18],"and":[19,53,69],"halo":[20],"profiles":[21],"have":[22],"been":[23,43,62],"optimized":[24],"to":[25,64],"enhance":[26],"the":[27,50,73],"body-bias":[28],"effect":[29],"of":[30,49,78],"45-nm":[31],"gate":[32,58,67],"length":[33],"devices.":[34],"Standby":[35],"leakage":[36,68,76],"reduction":[37],"without":[38],"reliability":[40],"compromise":[41],"has":[42,61],"demonstrated":[44],"with":[45],"simultaneous":[46],"voltage":[47],"control":[48],"bias":[52],"power":[54,81],"supply.":[55],"Moreover,":[56],"high-k":[57],"dielectric":[59],"\"HfSiON\"":[60],"adopted":[63],"reduce":[65],"GIDL,":[70],"which":[71],"are":[72],"dominant":[74],"standby":[75,80],"components":[77],"low":[79],"CMOS.":[82]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2016,"cited_by_count":2},{"year":2014,"cited_by_count":1}],"updated_date":"2026-04-05T17:49:38.594831","created_date":"2025-10-10T00:00:00"}
