{"id":"https://openalex.org/W1769991974","doi":"https://doi.org/10.1109/iscas.2003.1206303","title":"Exploiting reconfigurability for low-power control of embedded processors","display_name":"Exploiting reconfigurability for low-power control of embedded processors","publication_year":2003,"publication_date":"2003-11-04","ids":{"openalex":"https://openalex.org/W1769991974","doi":"https://doi.org/10.1109/iscas.2003.1206303","mag":"1769991974"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2003.1206303","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2003.1206303","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03.","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5062358729","display_name":"Luigi Carro","orcid":"https://orcid.org/0000-0002-7402-4780"},"institutions":[{"id":"https://openalex.org/I130442723","display_name":"Universidade Federal do Rio Grande do Sul","ror":"https://ror.org/041yk2d64","country_code":"BR","type":"education","lineage":["https://openalex.org/I130442723"]}],"countries":["BR"],"is_corresponding":true,"raw_author_name":"L. Carro","raw_affiliation_strings":["Instituto de Infotm\u00e1tica, Universidade Federal do Rio Grande do Sul, Brazil"],"affiliations":[{"raw_affiliation_string":"Instituto de Infotm\u00e1tica, Universidade Federal do Rio Grande do Sul, Brazil","institution_ids":["https://openalex.org/I130442723"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5073024579","display_name":"Edgard de Faria Corr\u00eaa","orcid":null},"institutions":[{"id":"https://openalex.org/I130442723","display_name":"Universidade Federal do Rio Grande do Sul","ror":"https://ror.org/041yk2d64","country_code":"BR","type":"education","lineage":["https://openalex.org/I130442723"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"E. Correa","raw_affiliation_strings":["Instituto de Infotm\u00e1tica, Universidade Federal do Rio Grande do Sul, Brazil"],"affiliations":[{"raw_affiliation_string":"Instituto de Infotm\u00e1tica, Universidade Federal do Rio Grande do Sul, Brazil","institution_ids":["https://openalex.org/I130442723"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5064590170","display_name":"Rodrigo Cardozo","orcid":null},"institutions":[{"id":"https://openalex.org/I130442723","display_name":"Universidade Federal do Rio Grande do Sul","ror":"https://ror.org/041yk2d64","country_code":"BR","type":"education","lineage":["https://openalex.org/I130442723"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"R. Cardozo","raw_affiliation_strings":["Instituto de Infotm\u00e1tica, Universidade Federal do Rio Grande do Sul, Brazil"],"affiliations":[{"raw_affiliation_string":"Instituto de Infotm\u00e1tica, Universidade Federal do Rio Grande do Sul, Brazil","institution_ids":["https://openalex.org/I130442723"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5025418231","display_name":"Fernando Moraes","orcid":"https://orcid.org/0000-0001-6126-6847"},"institutions":[{"id":"https://openalex.org/I130442723","display_name":"Universidade Federal do Rio Grande do Sul","ror":"https://ror.org/041yk2d64","country_code":"BR","type":"education","lineage":["https://openalex.org/I130442723"]},{"id":"https://openalex.org/I45643870","display_name":"Pontif\u00edcia Universidade Cat\u00f3lica do Rio Grande do Sul","ror":"https://ror.org/025vmq686","country_code":"BR","type":"education","lineage":["https://openalex.org/I45643870"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"F. Moraes","raw_affiliation_strings":["Faculdade de Inform\u00e1tica, Pontif\u00edcia Universidade Cat\u00f3lica do Rio Grande do Sul, Brazil","Instituto de Infotm\u00e1tica, Universidade Federal do Rio Grande do Sul, Brazil"],"affiliations":[{"raw_affiliation_string":"Faculdade de Inform\u00e1tica, Pontif\u00edcia Universidade Cat\u00f3lica do Rio Grande do Sul, Brazil","institution_ids":["https://openalex.org/I45643870"]},{"raw_affiliation_string":"Instituto de Infotm\u00e1tica, Universidade Federal do Rio Grande do Sul, Brazil","institution_ids":["https://openalex.org/I130442723"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5046426137","display_name":"S\u00e9rgio Bampi","orcid":"https://orcid.org/0000-0002-9018-6309"},"institutions":[{"id":"https://openalex.org/I130442723","display_name":"Universidade Federal do Rio Grande do Sul","ror":"https://ror.org/041yk2d64","country_code":"BR","type":"education","lineage":["https://openalex.org/I130442723"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"S. Bampi","raw_affiliation_strings":["Instituto de Infotm\u00e1tica, Universidade Federal do Rio Grande do Sul, Brazil"],"affiliations":[{"raw_affiliation_string":"Instituto de Infotm\u00e1tica, Universidade Federal do Rio Grande do Sul, Brazil","institution_ids":["https://openalex.org/I130442723"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5062358729"],"corresponding_institution_ids":["https://openalex.org/I130442723"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.08017535,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"5","issue":null,"first_page":"V","last_page":"421"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/reconfigurability","display_name":"Reconfigurability","score":0.9580361843109131},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7728077173233032},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.6551847457885742},{"id":"https://openalex.org/keywords/exploit","display_name":"Exploit","score":0.5985072255134583},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.560771107673645},{"id":"https://openalex.org/keywords/control-logic","display_name":"Control logic","score":0.4839232563972473},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.47366389632225037},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.46194347739219666},{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.4519413113594055},{"id":"https://openalex.org/keywords/programmable-logic-device","display_name":"Programmable logic device","score":0.4367867410182953},{"id":"https://openalex.org/keywords/non-volatile-memory","display_name":"Non-volatile memory","score":0.43089044094085693},{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.4100300967693329},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4000343382358551},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.33839714527130127},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.17932036519050598}],"concepts":[{"id":"https://openalex.org/C2780149590","wikidata":"https://www.wikidata.org/wiki/Q7302742","display_name":"Reconfigurability","level":2,"score":0.9580361843109131},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7728077173233032},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6551847457885742},{"id":"https://openalex.org/C165696696","wikidata":"https://www.wikidata.org/wiki/Q11287","display_name":"Exploit","level":2,"score":0.5985072255134583},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.560771107673645},{"id":"https://openalex.org/C2776350369","wikidata":"https://www.wikidata.org/wiki/Q843479","display_name":"Control logic","level":2,"score":0.4839232563972473},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.47366389632225037},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.46194347739219666},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.4519413113594055},{"id":"https://openalex.org/C206274596","wikidata":"https://www.wikidata.org/wiki/Q1063837","display_name":"Programmable logic device","level":2,"score":0.4367867410182953},{"id":"https://openalex.org/C177950962","wikidata":"https://www.wikidata.org/wiki/Q10997658","display_name":"Non-volatile memory","level":2,"score":0.43089044094085693},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.4100300967693329},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4000343382358551},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.33839714527130127},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.17932036519050598},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas.2003.1206303","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2003.1206303","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03.","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.800000011920929}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":31,"referenced_works":["https://openalex.org/W1507504962","https://openalex.org/W1886869053","https://openalex.org/W1972950739","https://openalex.org/W1980274772","https://openalex.org/W1984972320","https://openalex.org/W2004051654","https://openalex.org/W2032094184","https://openalex.org/W2032297914","https://openalex.org/W2078731123","https://openalex.org/W2115157620","https://openalex.org/W2117285153","https://openalex.org/W2119609467","https://openalex.org/W2123588954","https://openalex.org/W2125532939","https://openalex.org/W2129525499","https://openalex.org/W2131017271","https://openalex.org/W2135050419","https://openalex.org/W2141683244","https://openalex.org/W2150073849","https://openalex.org/W2154614859","https://openalex.org/W2156413870","https://openalex.org/W2158302919","https://openalex.org/W2169353948","https://openalex.org/W3141884580","https://openalex.org/W3143553783","https://openalex.org/W4243567444","https://openalex.org/W4250486818","https://openalex.org/W6639489044","https://openalex.org/W6677504465","https://openalex.org/W6679125430","https://openalex.org/W6682843658"],"related_works":["https://openalex.org/W2783549708","https://openalex.org/W2541870475","https://openalex.org/W2942190539","https://openalex.org/W2122487810","https://openalex.org/W2394445438","https://openalex.org/W2094590132","https://openalex.org/W4308906674","https://openalex.org/W2387290856","https://openalex.org/W2137476003","https://openalex.org/W2416331269"],"abstract_inverted_index":{"This":[0],"paper":[1],"proposes":[2],"and":[3],"evaluates":[4],"a":[5,53,67],"new":[6],"implementation":[7],"for":[8,36,70,76],"the":[9,22,41,49],"lowest":[10],"level":[11],"of":[12,26,31,43],"instruction":[13],"cache":[14],"memories,":[15],"which":[16],"provides":[17],"considerable":[18],"power":[19,71],"savings":[20],"in":[21,73],"control":[23],"memory":[24,50],"subsystem":[25],"standard":[27],"embedded":[28,79],"processors.":[29],"Instead":[30],"using":[32,44],"power-demanding":[33],"6-T":[34],"SRAMs":[35],"small":[37],"I-caches,":[38],"we":[39],"exploit":[40],"possibility":[42],"smaller":[45],"switching":[46],"capacitances,":[47],"substituting":[48],"array":[51],"with":[52],"specialized":[54],"programmable":[55],"logic":[56],"circuit.":[57],"Switching":[58],"gains":[59],"provided":[60],"by":[61],"this":[62],"substitution":[63],"are":[64],"presented,":[65],"illustrating":[66],"dramatic":[68],"potential":[69],"reduction":[72],"processor":[74],"architectures":[75],"portable":[77],"multimedia":[78],"applications.":[80]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
