{"id":"https://openalex.org/W2140980291","doi":"https://doi.org/10.1109/iscas.2003.1206226","title":"History-based memory mode prediction for improving memory performance","display_name":"History-based memory mode prediction for improving memory performance","publication_year":2003,"publication_date":"2003-11-04","ids":{"openalex":"https://openalex.org/W2140980291","doi":"https://doi.org/10.1109/iscas.2003.1206226","mag":"2140980291"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2003.1206226","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2003.1206226","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03.","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5078807016","display_name":"Seong-Il Park","orcid":"https://orcid.org/0000-0001-6024-2448"},"institutions":[{"id":"https://openalex.org/I157485424","display_name":"Korea Advanced Institute of Science and Technology","ror":"https://ror.org/05apxxy63","country_code":"KR","type":"education","lineage":["https://openalex.org/I157485424"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Seong-Il Park","raw_affiliation_strings":["Division of Electrical Engineering, Department of EECS, KAIST, Daejeon, South Korea","[Department of EECS., KAIST, Daejeon, South Korea]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Division of Electrical Engineering, Department of EECS, KAIST, Daejeon, South Korea","institution_ids":["https://openalex.org/I157485424"]},{"raw_affiliation_string":"[Department of EECS., KAIST, Daejeon, South Korea]","institution_ids":["https://openalex.org/I157485424"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5087977408","display_name":"In\u2010Cheol Park","orcid":"https://orcid.org/0000-0003-3524-2838"},"institutions":[{"id":"https://openalex.org/I157485424","display_name":"Korea Advanced Institute of Science and Technology","ror":"https://ror.org/05apxxy63","country_code":"KR","type":"education","lineage":["https://openalex.org/I157485424"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"In-Cheol Park","raw_affiliation_strings":["Division of Electrical Engineering, Department of EECS, KAIST, Daejeon, South Korea","[Department of EECS., KAIST, Daejeon, South Korea]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Division of Electrical Engineering, Department of EECS, KAIST, Daejeon, South Korea","institution_ids":["https://openalex.org/I157485424"]},{"raw_affiliation_string":"[Department of EECS., KAIST, Daejeon, South Korea]","institution_ids":["https://openalex.org/I157485424"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":19,"citation_normalized_percentile":{"value":0.20808383,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":"5","issue":null,"first_page":"V","last_page":"185"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9983000159263611,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7944263815879822},{"id":"https://openalex.org/keywords/interleaved-memory","display_name":"Interleaved memory","score":0.6410142183303833},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.6166364550590515},{"id":"https://openalex.org/keywords/idle","display_name":"Idle","score":0.5999370813369751},{"id":"https://openalex.org/keywords/flat-memory-model","display_name":"Flat memory model","score":0.5601880550384521},{"id":"https://openalex.org/keywords/registered-memory","display_name":"Registered memory","score":0.5188252329826355},{"id":"https://openalex.org/keywords/memory-management","display_name":"Memory management","score":0.45118340849876404},{"id":"https://openalex.org/keywords/scheme","display_name":"Scheme (mathematics)","score":0.44775810837745667},{"id":"https://openalex.org/keywords/mode","display_name":"Mode (computer interface)","score":0.41374707221984863},{"id":"https://openalex.org/keywords/extended-memory","display_name":"Extended memory","score":0.41262030601501465},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.3871641159057617},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.35480326414108276},{"id":"https://openalex.org/keywords/real-time-computing","display_name":"Real-time computing","score":0.3275306820869446},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3230857253074646},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.2592756152153015},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.1546478271484375},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.08380323648452759}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7944263815879822},{"id":"https://openalex.org/C63511323","wikidata":"https://www.wikidata.org/wiki/Q908936","display_name":"Interleaved memory","level":4,"score":0.6410142183303833},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.6166364550590515},{"id":"https://openalex.org/C16320812","wikidata":"https://www.wikidata.org/wiki/Q1812200","display_name":"Idle","level":2,"score":0.5999370813369751},{"id":"https://openalex.org/C57863822","wikidata":"https://www.wikidata.org/wiki/Q905488","display_name":"Flat memory model","level":4,"score":0.5601880550384521},{"id":"https://openalex.org/C93446704","wikidata":"https://www.wikidata.org/wiki/Q449328","display_name":"Registered memory","level":3,"score":0.5188252329826355},{"id":"https://openalex.org/C176649486","wikidata":"https://www.wikidata.org/wiki/Q2308807","display_name":"Memory management","level":3,"score":0.45118340849876404},{"id":"https://openalex.org/C77618280","wikidata":"https://www.wikidata.org/wiki/Q1155772","display_name":"Scheme (mathematics)","level":2,"score":0.44775810837745667},{"id":"https://openalex.org/C48677424","wikidata":"https://www.wikidata.org/wiki/Q6888088","display_name":"Mode (computer interface)","level":2,"score":0.41374707221984863},{"id":"https://openalex.org/C171675096","wikidata":"https://www.wikidata.org/wiki/Q1143380","display_name":"Extended memory","level":4,"score":0.41262030601501465},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.3871641159057617},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.35480326414108276},{"id":"https://openalex.org/C79403827","wikidata":"https://www.wikidata.org/wiki/Q3988","display_name":"Real-time computing","level":1,"score":0.3275306820869446},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3230857253074646},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.2592756152153015},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.1546478271484375},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.08380323648452759},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas.2003.1206226","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2003.1206226","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03.","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.4300000071525574,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320322202","display_name":"IC Design Education Center","ror":"https://ror.org/005v57z85"},{"id":"https://openalex.org/F4320322348","display_name":"Korea Science and Engineering Foundation","ror":"https://ror.org/013aysd81"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":14,"referenced_works":["https://openalex.org/W1668633329","https://openalex.org/W2012137708","https://openalex.org/W2031427648","https://openalex.org/W2040604914","https://openalex.org/W2101166324","https://openalex.org/W2103027715","https://openalex.org/W2111200383","https://openalex.org/W2115186302","https://openalex.org/W2134420626","https://openalex.org/W2136004815","https://openalex.org/W2144612820","https://openalex.org/W3027993377","https://openalex.org/W6681828901","https://openalex.org/W6777691482"],"related_works":["https://openalex.org/W2155373950","https://openalex.org/W2354036839","https://openalex.org/W3048967625","https://openalex.org/W4243618206","https://openalex.org/W2138825797","https://openalex.org/W2491097902","https://openalex.org/W1575240748","https://openalex.org/W4248614727","https://openalex.org/W2296275612","https://openalex.org/W2564569739"],"abstract_inverted_index":{"To":[0],"increase":[1],"the":[2,34,49,56,60,67,73,79],"bandwidth":[3],"of":[4,36,42,62],"synchronous":[5],"memories":[6],"that":[7,55,76],"are":[8],"widely":[9],"adopted":[10],"for":[11],"high":[12],"performance":[13],"memory":[14,50,68,80],"systems,":[15],"a":[16],"predictive":[17],"mode":[18],"control":[19],"scheme":[20,75],"is":[21,45],"proposed":[22,57],"in":[23,81],"this":[24],"paper.":[25],"Memory":[26],"latency":[27,69],"can":[28],"be":[29],"reduced":[30],"by":[31,70],"effectively":[32],"managing":[33],"states":[35],"banks.":[37],"The":[38],"local":[39],"access":[40],"history":[41],"each":[43],"bank":[44],"considered":[46],"to":[47],"predict":[48],"mode.":[51],"Experimental":[52],"results":[53],"show":[54],"scheme,":[58],"at":[59],"cost":[61],"negligible":[63],"area":[64],"overhead,":[65],"reduces":[66],"19.0%":[71],"over":[72],"conventional":[74],"always":[77],"keeps":[78],"idle":[82],"state.":[83]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":2},{"year":2021,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":2},{"year":2015,"cited_by_count":2},{"year":2014,"cited_by_count":3},{"year":2013,"cited_by_count":2},{"year":2012,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}