{"id":"https://openalex.org/W1700223220","doi":"https://doi.org/10.1109/iscas.2003.1206176","title":"Symbolic analysis: a formulation approach by manipulating data structures","display_name":"Symbolic analysis: a formulation approach by manipulating data structures","publication_year":2003,"publication_date":"2003-11-04","ids":{"openalex":"https://openalex.org/W1700223220","doi":"https://doi.org/10.1109/iscas.2003.1206176","mag":"1700223220"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2003.1206176","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2003.1206176","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03.","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":null,"display_name":"E. Tielo-Cuautle","orcid":null},"institutions":[{"id":"https://openalex.org/I39824353","display_name":"National Institute of Astrophysics, Optics and Electronics","ror":"https://ror.org/00bpmmc63","country_code":"MX","type":"facility","lineage":["https://openalex.org/I39824353"]}],"countries":["MX"],"is_corresponding":false,"raw_author_name":"E. Tielo-Cuautle","raw_affiliation_strings":["Electron. Dept., INAOE, Mexico City, Mexico"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Electron. Dept., INAOE, Mexico City, Mexico","institution_ids":["https://openalex.org/I39824353"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5032954605","display_name":"C. S\u00e1nchez\u2010L\u00f3pez","orcid":"https://orcid.org/0000-0002-3214-5832"},"institutions":[{"id":"https://openalex.org/I39824353","display_name":"National Institute of Astrophysics, Optics and Electronics","ror":"https://ror.org/00bpmmc63","country_code":"MX","type":"facility","lineage":["https://openalex.org/I39824353"]}],"countries":["MX"],"is_corresponding":false,"raw_author_name":"C. Sanchez-Lopez","raw_affiliation_strings":["INAOE: Electronics Department, Integrated Circuit Design Group, M\u00e9xico","Electron. Dept., INAOE, Mexico City, Mexico"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"INAOE: Electronics Department, Integrated Circuit Design Group, M\u00e9xico","institution_ids":[]},{"raw_affiliation_string":"Electron. Dept., INAOE, Mexico City, Mexico","institution_ids":["https://openalex.org/I39824353"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5016794649","display_name":"F. Sandoval\u2010Ibarra","orcid":"https://orcid.org/0000-0003-3073-2870"},"institutions":[{"id":"https://openalex.org/I68368234","display_name":"Centro de Investigaci\u00f3n y de Estudios Avanzados del Instituto Polit\u00e9cnico Nacional","ror":"https://ror.org/009eqmr18","country_code":"MX","type":"facility","lineage":["https://openalex.org/I59361560","https://openalex.org/I68368234"]}],"countries":["MX"],"is_corresponding":false,"raw_author_name":"F. Sandoval-Ibarra","raw_affiliation_strings":["CINVESTAV: Guadalajara Unit, Electronics Design Group, M\u00e9xico","Electronics Design Group, Guadalajara Unit, CINVESTAV, Mexico","[Electronics Design Group, Guadalajara Unit, CINVESTAV, Mexico, CINVESTAV: Guadalajara Unit, Electronics Design Group, M\u00e9xico]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"CINVESTAV: Guadalajara Unit, Electronics Design Group, M\u00e9xico","institution_ids":[]},{"raw_affiliation_string":"Electronics Design Group, Guadalajara Unit, CINVESTAV, Mexico","institution_ids":["https://openalex.org/I68368234"]},{"raw_affiliation_string":"[Electronics Design Group, Guadalajara Unit, CINVESTAV, Mexico, CINVESTAV: Guadalajara Unit, Electronics Design Group, M\u00e9xico]","institution_ids":["https://openalex.org/I68368234"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":2.4019,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":{"value":0.87815165,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"4","issue":null,"first_page":"IV","last_page":"640"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/admittance-parameters","display_name":"Admittance parameters","score":0.7902878522872925},{"id":"https://openalex.org/keywords/symbolic-data-analysis","display_name":"Symbolic data analysis","score":0.718526303768158},{"id":"https://openalex.org/keywords/admittance","display_name":"Admittance","score":0.7138418555259705},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6182919144630432},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.5887632966041565},{"id":"https://openalex.org/keywords/matrix","display_name":"Matrix (chemical analysis)","score":0.5353294610977173},{"id":"https://openalex.org/keywords/minification","display_name":"Minification","score":0.5216434597969055},{"id":"https://openalex.org/keywords/matrix-algebra","display_name":"Matrix algebra","score":0.4636498689651489},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.4308010935783386},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.3391221761703491},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.28705883026123047},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.16240182518959045},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.13319146633148193},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.09684708714485168},{"id":"https://openalex.org/keywords/electrical-impedance","display_name":"Electrical impedance","score":0.07943102717399597},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.07759109139442444}],"concepts":[{"id":"https://openalex.org/C133833761","wikidata":"https://www.wikidata.org/wiki/Q16001847","display_name":"Admittance parameters","level":3,"score":0.7902878522872925},{"id":"https://openalex.org/C65620979","wikidata":"https://www.wikidata.org/wiki/Q7661176","display_name":"Symbolic data analysis","level":2,"score":0.718526303768158},{"id":"https://openalex.org/C108811297","wikidata":"https://www.wikidata.org/wiki/Q214518","display_name":"Admittance","level":3,"score":0.7138418555259705},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6182919144630432},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.5887632966041565},{"id":"https://openalex.org/C106487976","wikidata":"https://www.wikidata.org/wiki/Q685816","display_name":"Matrix (chemical analysis)","level":2,"score":0.5353294610977173},{"id":"https://openalex.org/C147764199","wikidata":"https://www.wikidata.org/wiki/Q6865248","display_name":"Minification","level":2,"score":0.5216434597969055},{"id":"https://openalex.org/C2988995629","wikidata":"https://www.wikidata.org/wiki/Q2915729","display_name":"Matrix algebra","level":3,"score":0.4636498689651489},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.4308010935783386},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3391221761703491},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.28705883026123047},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.16240182518959045},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.13319146633148193},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.09684708714485168},{"id":"https://openalex.org/C17829176","wikidata":"https://www.wikidata.org/wiki/Q179043","display_name":"Electrical impedance","level":2,"score":0.07943102717399597},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.07759109139442444},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C158693339","wikidata":"https://www.wikidata.org/wiki/Q190524","display_name":"Eigenvalues and eigenvectors","level":2,"score":0.0},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.0},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.0},{"id":"https://openalex.org/C159985019","wikidata":"https://www.wikidata.org/wiki/Q181790","display_name":"Composite material","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas.2003.1206176","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2003.1206176","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03.","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":14,"referenced_works":["https://openalex.org/W64468155","https://openalex.org/W563978581","https://openalex.org/W625187745","https://openalex.org/W1521027360","https://openalex.org/W1548102932","https://openalex.org/W1565462788","https://openalex.org/W2013286089","https://openalex.org/W2097913753","https://openalex.org/W2111385050","https://openalex.org/W3145595827","https://openalex.org/W4236849951","https://openalex.org/W6615703740","https://openalex.org/W6619840398","https://openalex.org/W6632817504"],"related_works":["https://openalex.org/W2563111511","https://openalex.org/W2913402129","https://openalex.org/W2161728531","https://openalex.org/W2044195815","https://openalex.org/W2541620444","https://openalex.org/W2057151759","https://openalex.org/W2368309484","https://openalex.org/W2066729819","https://openalex.org/W2460740512","https://openalex.org/W2128606015"],"abstract_inverted_index":{"A":[0],"formulation":[1],"approach":[2],"for":[3],"symbolic":[4,46],"analysis":[5],"of":[6,29,44,56],"analog":[7],"circuits":[8],"modeled":[9],"by":[10,60],"nullors,":[11],"is":[12,17,58],"introduced.":[13],"The":[14],"proposed":[15],"technique":[16],"based":[18],"on":[19],"manipulating":[20],"data-structures:":[21],"including":[22],"only":[23],"admittances,":[24],"nullators":[25],"and":[26],"norators,":[27],"instead":[28],"the":[30,53,62,66],"nodal-admittance-matrix":[31],"manipulation.":[32],"By":[33],"using":[34,65],"this":[35],"technique,":[36],"CPU-time":[37],"minimization":[38],"as":[39,41],"well":[40],"fast":[42],"manipulation":[43],"complex":[45],"expressions":[47],"are":[48],"tasks":[49],"highly":[50],"improved.":[51],"Thus,":[52],"reduced":[54,63],"system":[55],"equations":[57],"formulated":[59],"fill-in":[61],"admittance-matrix":[64],"nullor":[67],"interconnection-properties.":[68]},"counts_by_year":[],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}