{"id":"https://openalex.org/W1583933716","doi":"https://doi.org/10.1109/iscas.2003.1206174","title":"Accurate VHDL-based simulation of \u03a3\u0394 modulators","display_name":"Accurate VHDL-based simulation of \u03a3\u0394 modulators","publication_year":2003,"publication_date":"2003-11-04","ids":{"openalex":"https://openalex.org/W1583933716","doi":"https://doi.org/10.1109/iscas.2003.1206174","mag":"1583933716"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2003.1206174","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2003.1206174","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03.","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5068422347","display_name":"R. Castro\u2010L\u00f3pez","orcid":"https://orcid.org/0000-0002-6247-3124"},"institutions":[{"id":"https://openalex.org/I4210104545","display_name":"Instituto de Microelectr\u00f3nica de Sevilla","ror":"https://ror.org/01mqtzm43","country_code":"ES","type":"facility","lineage":["https://openalex.org/I134820265","https://openalex.org/I4210104545","https://openalex.org/I4210147934","https://openalex.org/I79238269"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"R. Castro-Lopez","raw_affiliation_strings":["IMSE-CNM, Seville, Spain"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IMSE-CNM, Seville, Spain","institution_ids":["https://openalex.org/I4210104545"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5041853563","display_name":"F.V. Fern\u00e1ndez","orcid":"https://orcid.org/0000-0001-8682-2280"},"institutions":[{"id":"https://openalex.org/I4210104545","display_name":"Instituto de Microelectr\u00f3nica de Sevilla","ror":"https://ror.org/01mqtzm43","country_code":"ES","type":"facility","lineage":["https://openalex.org/I134820265","https://openalex.org/I4210104545","https://openalex.org/I4210147934","https://openalex.org/I79238269"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"F.V. Fernandez","raw_affiliation_strings":["Escuela Superior de Ingenieros, Seville, Spain","IMSE-CNM, Seville, Spain"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Escuela Superior de Ingenieros, Seville, Spain","institution_ids":[]},{"raw_affiliation_string":"IMSE-CNM, Seville, Spain","institution_ids":["https://openalex.org/I4210104545"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5051825488","display_name":"F. Medeiro","orcid":null},"institutions":[{"id":"https://openalex.org/I4210104545","display_name":"Instituto de Microelectr\u00f3nica de Sevilla","ror":"https://ror.org/01mqtzm43","country_code":"ES","type":"facility","lineage":["https://openalex.org/I134820265","https://openalex.org/I4210104545","https://openalex.org/I4210147934","https://openalex.org/I79238269"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"F. Medeiro","raw_affiliation_strings":["Escuela Superior de Ingenieros, Seville, Spain","IMSE-CNM, Seville, Spain"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Escuela Superior de Ingenieros, Seville, Spain","institution_ids":[]},{"raw_affiliation_string":"IMSE-CNM, Seville, Spain","institution_ids":["https://openalex.org/I4210104545"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5029359976","display_name":"\u00c1. Rodr\u00edguez\u2010V\u00e1zquez","orcid":"https://orcid.org/0000-0002-1006-5241"},"institutions":[{"id":"https://openalex.org/I4210104545","display_name":"Instituto de Microelectr\u00f3nica de Sevilla","ror":"https://ror.org/01mqtzm43","country_code":"ES","type":"facility","lineage":["https://openalex.org/I134820265","https://openalex.org/I4210104545","https://openalex.org/I4210147934","https://openalex.org/I79238269"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"A. Rodriguez-Vazquez","raw_affiliation_strings":["Escuela Superior de Ingenieros, Seville, Spain","IMSE-CNM, Seville, Spain"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Escuela Superior de Ingenieros, Seville, Spain","institution_ids":[]},{"raw_affiliation_string":"IMSE-CNM, Seville, Spain","institution_ids":["https://openalex.org/I4210104545"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I4210104545"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.07029712,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"4","issue":null,"first_page":"IV","last_page":"632"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/sigma","display_name":"Sigma","score":0.7338681221008301},{"id":"https://openalex.org/keywords/hardware-description-language","display_name":"Hardware description language","score":0.6941192150115967},{"id":"https://openalex.org/keywords/vhdl","display_name":"VHDL","score":0.6755886077880859},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6257642507553101},{"id":"https://openalex.org/keywords/delta-sigma-modulation","display_name":"Delta-sigma modulation","score":0.6124280691146851},{"id":"https://openalex.org/keywords/vhdl-ams","display_name":"VHDL-AMS","score":0.5837181210517883},{"id":"https://openalex.org/keywords/cascade","display_name":"Cascade","score":0.5584885478019714},{"id":"https://openalex.org/keywords/six-sigma","display_name":"Six Sigma","score":0.4196828007698059},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4133196771144867},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.24532032012939453},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.20068001747131348},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.1577293872833252},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.10395470261573792},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.09216183423995972}],"concepts":[{"id":"https://openalex.org/C2778049214","wikidata":"https://www.wikidata.org/wiki/Q7512234","display_name":"Sigma","level":2,"score":0.7338681221008301},{"id":"https://openalex.org/C42143788","wikidata":"https://www.wikidata.org/wiki/Q173341","display_name":"Hardware description language","level":3,"score":0.6941192150115967},{"id":"https://openalex.org/C36941000","wikidata":"https://www.wikidata.org/wiki/Q209455","display_name":"VHDL","level":3,"score":0.6755886077880859},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6257642507553101},{"id":"https://openalex.org/C68754193","wikidata":"https://www.wikidata.org/wiki/Q1184820","display_name":"Delta-sigma modulation","level":3,"score":0.6124280691146851},{"id":"https://openalex.org/C2776513426","wikidata":"https://www.wikidata.org/wiki/Q2744740","display_name":"VHDL-AMS","level":4,"score":0.5837181210517883},{"id":"https://openalex.org/C34146451","wikidata":"https://www.wikidata.org/wiki/Q5048094","display_name":"Cascade","level":2,"score":0.5584885478019714},{"id":"https://openalex.org/C23119410","wikidata":"https://www.wikidata.org/wiki/Q236908","display_name":"Six Sigma","level":3,"score":0.4196828007698059},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4133196771144867},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.24532032012939453},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.20068001747131348},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.1577293872833252},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.10395470261573792},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.09216183423995972},{"id":"https://openalex.org/C42360764","wikidata":"https://www.wikidata.org/wiki/Q83588","display_name":"Chemical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas.2003.1206174","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2003.1206174","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03.","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":4,"referenced_works":["https://openalex.org/W616429135","https://openalex.org/W2105154091","https://openalex.org/W2145288911","https://openalex.org/W4214709312"],"related_works":["https://openalex.org/W1586741485","https://openalex.org/W2357636087","https://openalex.org/W2070083638","https://openalex.org/W3021694037","https://openalex.org/W2543386576","https://openalex.org/W2091509145","https://openalex.org/W2096642685","https://openalex.org/W2109164748","https://openalex.org/W2536306358","https://openalex.org/W2127358384"],"abstract_inverted_index":{"The":[0],"computational":[1],"cost":[2],"of":[3,6,61,69,76,108],"transient":[4],"simulation":[5,22],"/spl":[7,51,77,85,114],"Sigma//spl":[8,12,52,78,86,115],"Delta/":[9,53],"modulators":[10],"(/spl":[11],"Delta/Ms)":[13],"at":[14],"the":[15,74],"electrical":[16],"level":[17],"is":[18,80],"prohibitively":[19],"high.":[20],"Behavioral":[21],"techniques":[23],"offer":[24],"a":[25,45,59,66,109],"promising":[26],"solution":[27],"to":[28,48],"this":[29,57],"problem.":[30],"This":[31],"paper":[32],"demonstrates":[33],"that":[34],"both":[35],"hardware":[36],"description":[37],"languages":[38],"(HDLs)":[39],"and":[40],"commercial":[41],"HDL":[42,62],"simulators":[43],"constitute":[44],"valuable":[46],"alternative":[47],"traditional":[49],"special-purpose":[50],"behavioral":[54],"simulators.":[55],"In":[56],"sense,":[58],"library":[60],"building":[63],"blocks,":[64,84],"modeling":[65],"complete":[67],"set":[68],"circuit":[70],"non-idealities":[71],"which":[72,96],"influence":[73],"performance":[75],"Delta/Ms,":[79],"presented.":[81],"With":[82],"these":[83],"Delta/M":[87],"architectures":[88],"can":[89],"be":[90],"described":[91],"in":[92,99],"two":[93],"different":[94],"ways,":[95],"are":[97,103],"analyzed":[98],"detail.":[100],"Experimental":[101],"results":[102],"provided":[104],"through":[105],"several":[106],"simulations":[107],"fourth-order":[110],"2-1-1":[111],"cascade":[112],"multi-bit":[113],"Delta/M.":[116]},"counts_by_year":[],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
